Fix compatible of rga to "rockchip,rga2", and modify the clock names
to work fine with current driver.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Icd30ef8e090aceedbc680eb39c4a0c5b00869102
Note, the corresponding mali_csffw.bin for DDK g15 MUST be used.
Change-Id: Ic30634fa6247d62bf96f506c64d13b89e16b02e6
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Due to the reuse of pins on the evb board,
wifi enable requires that rgb be temporarily turned off
Signed-off-by: Jian Zheng <zj@rock-chips.com>
Change-Id: I7f19d8d6ea80faee66dc1c44bb06b9e0d1507edf
If xpcs_eee clock was not enabled, the sgmii mode cannot work
after suspend/resume.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: If187b8e3344553f2e7062c677b1a851a761b5a18
It is cleaner to set lease key to zero in the places where leases are not
supported (smb1 can not return lease keys so the field was uninitialized).
Addresses-Coverity: 1513994 ("Uninitialized scalar variable")
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Steve French <stfrench@microsoft.com>
(cherry picked from commit 625b60d4f9)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I0cef58f5169c3e2b2fbe427f2340c277174a2be0
We were trying to fill in uninitialized file attributes in the error case.
Addresses-Coverity: 139689 ("Uninitialized variables")
Signed-off-by: Steve French <stfrench@microsoft.com>
(cherry picked from commit e39df24169)
Change-Id: Id02f0a50c2ba3505bb8f5538f489e451c9423c0b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
In order not to affect other clocks, remove the apll from the
parent list of other clocks and only core, mac and lcdc can
select apll as parent.
Change-Id: I58b995f8ccf69c6564f74b5823f618a186030d70
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
In order to ensure the accuracy of PWM voltage regulation, keep
the pull state of PWM consistent with the default; The pull state
has little effect on other case such as output mode.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I4d4813a9426e45a1c3f3690603b63c57addcdb73
Using wait_event_timeout() replace wait_event_interruptible_timeout().
Change-Id: I53481d25cb96a86a6262672bb65e9a2ed942164a
Signed-off-by: Shuangjie Lin <shuangjie.lin@rock-chips.com>
Fixes: 938e2f2261 ("clk: rockchip: drop use of rockchip_clk_protect_critical()")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I65b4dd2f380d30d7638212234ff23dc17e2d4349
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If9c2d2fdedbc2673b2fe0e6738ed8fb54c98a0ba
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.
Change-Id: I0611b7a291351a20f72b5124c501dc79d92787d6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
rng node is compflict with crypto node, so default disable
rng node and crypto node.
Change-Id: I9a28108a5667f88c15d5cc9916d927115cdb8918
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
GSL3673 is a touchscreen device, let support it.
Change-Id: I4bf302c395491ca49a1874c8984caa0b49cfb326
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Uart3 has been iomux to gpio, for vcc_3g regulator, which is designed
on rk3288 evb main board.
Disable unused uarts to fix gpio request blame during system booting.
Change-Id: I2eb79ae63a6f226255c12fc3da9ba95ec4219d32
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This patch add and enable AP6335 wifi node for rk3288-evb
Change-Id: I49e7f6a67130a105579627d30db55010967da57a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This adds force abnormal ohci relinquish port owner
and back to ehci on rk3288 SoC.
Change-Id: I33be55c08762be7e8a239f741a8c8dbb28522306
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The default parent of i2s_src is 200MHz CPLL, it doesn't meet
the constraint of fractional divider that denominator must be
20 times larger than numerator.
Change-Id: I986525ca7a92cb5883facd1b6e89079398302856
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This change adds USB-PHY output clock reference for EHCI and OHCI.
Change-Id: I39e91fed99756a86c83fe9332587c6630a5e5853
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
