1.Some 8K frames took more than 200ms to decode,causing software timeout.
Solution:
Increase the software timeout threshold to 500ms
2.After power off av1dec, read/write reg in cache irq causing kernel
crash.
Solution:
There are two irq for av1:
a. vcd_irq is decode irq what we need to care about.
b. cache irq what we do not need to care about.
So disable the cache irq temporarily.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I282b8e0614321b5adf0fac5f31bb88e2bdb2bf6c
1.Protect clock and iomux resources used by AMP.
2.Support AMP cpu on/off.
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: If53e893fac916217bfa5618350b1706b742b34e7
Delete nodes in case of:
* node is null, without any property and children node
* node with 'status' property but not "okay" or "ok"
Change-Id: Ic7d2ba1cb60350c21fa6a46222c20870c74359d4
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
before:
text data bss dec hex filename
6301 23000 8 29309 727d drivers/clk/rockchip/clk-rv1106.o
after:
text data bss dec hex filename
5483 22892 8 28383 6edf drivers/clk/rockchip/clk-rv1106.o
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ibb023c4353fa3bbd85b15d415c46d70774f4fcca
Use the driver's mmu configuration to replace the user's mmu configuration.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ib6c535bf0f8d714e6535c27cc0181f5c3a39d7ae
For dmabuf, owner has set a name for the buffer, use the dmabuf->name to
replace orig_alloc to save several memory.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ifad14ed886580d2a9f3000900e1849b0b5a3858e
For some Rockchip platforms (e.g. RV1106 UVC), it needs to
get the offset in the plane which used for the start of data
in the uvc buffer.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0144709f33b1d3ca955779be487134901468923f
Add a new helper function to get the offset in the plane
to the start of data for the usb gadget uvc function.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Id2d2c928a531d0272e6241b967fb0deaf3f3e122
For DPTX controller, It may be work abnormal when hsync less
than 32. Filtering the display mode whose hsyncd is less
than 32.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I857b1f7af51f7c04633526ae9239917e75e3e0d0
We now don't wait FIFO status at the end of request but
at the beginning of upcoming request, which is the same way
we did for unbusy check in the past. By doing that, we can
hand out cpu.
Fixes: 6eca689b99 ("mmc: dw_mmc: Workaround for RV1106/1103 sdmmc")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ie5934b49d2babada81cc447763bb8f980b4884ec
The dwc2_queue_transaction() do data transfer for DMA
mode if both the params.host_dma and chan->qh are true.
In a test-case with an otg cable hot plug stress test
in DMA mode, if the chan->qh is NULL, it is possible to
do dwc2_hc_write_packet() which should only be called
in Slave mode and cause a crash:
[ 633.852937] usb 1-1: reset high-speed USB device number 71 using dwc2
[ 633.853115] Unable to handle kernel read from unreadable memory at virtual address 0000000000000000
...
[ 633.974040] Call trace:
[ 633.974289] dwc2_hc_write_packet.isra.6+0xfc/0x128
[ 633.974734] dwc2_queue_transaction+0xc4/0x1f0
[ 633.975142] dwc2_hcd_queue_transactions+0x10c/0x4b8
[ 633.975595] dwc2_release_channel+0x12c/0x2a8
[ 633.975992] dwc2_complete_non_periodic_xfer.isra.5+0x2c/0x48
[ 633.976514] dwc2_hc_xfercomp_intr+0x370/0x488
[ 633.976921] dwc2_hc_n_intr+0x2c8/0x840
[ 633.977282] dwc2_handle_hcd_intr+0x424/0x7e0
[ 633.977677] _dwc2_hcd_irq+0x10/0x18
[ 633.978018] usb_hcd_irq+0x2c/0x48
Change-Id: I33f7976710d6cdceb1b4758655dba7890488585d
Signed-off-by: William Wu <william.wu@rock-chips.com>
The parent clock of sclk_sfc are 500m_300m_200m_24m, so that can't set
sclk_sfc to 118.8MHz.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I71b60000a465c23e88155ac9da95cf046717a6d8
Guarantee that initramfs been mounted until hardware decompress is
completed.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I58fb197040d0c1880e4dd710e99161e19dee26da
- Remove disable/enable ADC after put ADC mode
- Makes the unity name for ACODEC_ADC_L(R)_DIG_VOL
- Fixes ACODEC_ADC_L_WORK to ACODEC_ADC_R_WORK for right channel
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: I21912c96d9ed6954556983745f94ea0e1dbb6283
If dma size is 0, it is considered that there is no configuration
from dts, and the default value is used.
Fixes: bde32557c5 ("ethernet: stmmac: Dynamically change limit to fit dma size")
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I3bc37fe86d972175ffafc9ccf5072938199f849d
Add a config to on/off the driver print, default to be off.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I2f2ec608547bca06d12238d13a8824dc651404c0
