Commit Graph

1064615 Commits

Author SHA1 Message Date
XiaoTan Luo
ffdc12a182 ASoC: rockchip: multicodecs: Fix panic when get adc error
[   30.670500] Internal error: Oops: 96000005 [#1] SMP
[   30.670947] Modules linked in:
[   30.671257] CPU: 0 PID: 105 Comm: kworker/u16:1 Not tainted 5.10.66 #172
[   30.671866] Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT)
[   30.672447] Workqueue: events_power_efficient adc_jack_handler
[   30.672989] pstate: 60c00009 (nZCv daif +PAN +UAO -TCO BTYPE=--)
[   30.673548] pc : iio_read_channel_processed+0x28/0xdc
[   30.674023] lr : adc_jack_handler+0xc8/0x188
[   30.674418] sp : ffffffc012783d50
[   30.674731] x29: ffffffc012783d50 x28: 0000000000000000
[   30.675240] x27: ffffffc011cc9960 x26: 0000000000000000
[   30.675735] x25: ffffffc011a17980 x24: 0000000000000000
[   30.676232] x23: ffffff840002e100 x22: ffffffc011cc99a0
[   30.676728] x21: ffffffc012783da4 x20: ffffffffffffffed
[   30.677234] x19: ffffff8402c6c880 x18: 0000000000000000
[   30.677730] x17: 0000000000000000 x16: 0000000000000000
[   30.678236] x15: 0000000000000000 x14: 0000000000000000
[   30.678742] x13: 0000000000000000 x12: 0000000000000000
[   30.679247] x11: 0000000000000000 x10: 0000000000000db0
[   30.679753] x9 : ffffffc010b90a58 x8 : ffffff840098da7c
[   30.680259] x7 : fefefefefefefeff x6 : 0000746e65696369
[   30.680765] x5 : 0000000000000018 x4 : ffffff840098da6c
[   30.681262] x3 : ffffff8400f15000 x2 : 0000000000000000
[   30.681758] x1 : ffffffc012783da4 x0 : ffffffffffffffed
[   31.074520] Call trace:
[   31.074764]  iio_read_channel_processed+0x28/0xdc
[   31.075205]  adc_jack_handler+0xc8/0x188
[   31.075576]  process_one_work+0x1e0/0x298
[   31.075955]  worker_thread+0x1e4/0x27c
[   31.076310]  kthread+0xf8/0x108
[   31.076609]  ret_from_fork+0x10/0x30
[   31.076957] Code: a90153f3 aa0003f4 f90013f5 aa010

Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I974d757819c3ffdd801711dc6561753ee2ee455a
2021-12-27 11:10:58 +08:00
Finley Xiao
500092fdf3 arm64: dts: rockchip: rk3588s: Add opp table for npu
Use scmi clk for npu.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Id03b5dd5d2f96276afb1b5c22b6ec51454910a88
2021-12-27 11:08:36 +08:00
Yifeng Zhao
69da1839de mmc: core: add argument check for cmd1
According to eMMC specification v5.1 section A6.1, the R3 response
value should be 0x00FF8080, 0x40FF8080, 0x80FF8080 or 0xC0FF8080.
The EMMC device may be abnormal if a wrong OCR data is configured.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I5b19c0a937b55dc75e9d1abf7f9c8cf9a5d083b5
2021-12-27 11:00:46 +08:00
YouMin Chen
44f46d2c06 arm64: dts: rockchip: add rk3588 dmc relate node
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I89520fdd76f7584b17312c2c7a88f8b6271d4c7d
2021-12-25 19:34:05 +08:00
YouMin Chen
5c4f1d6e3d PM / devfreq: rockchip_dmc: add support for rk3588
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I2869e9a9afa3531d8300ef04393f0e6ea61626d2
2021-12-24 20:23:13 +08:00
Zhihuan He
832638dbb5 arm64: dts: rockchip: rk3588s: add dfi node
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0148d935391c1369251787608fe18f22322e17cd
2021-12-24 20:20:14 +08:00
Zhihuan He
d932640623 PM / devfreq: rockchip-dfi: add rk3588 dfi support
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0bebfd16aa4897f770f70aca70b0e9a88808446f
2021-12-24 20:16:47 +08:00
Finley Xiao
39bdbea57c arm64: dts: rockchip: rk3588s: Add HCLK_NPU_CM0_ROOT for npu pd
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie53da54a1e2c5722cec55473ffc6c4c4c04149ff
2021-12-24 18:36:23 +08:00
YouMin Chen
143b95aa9a dt-bindings: devfreq: rockchip_dmc: add rk3588 support
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Ia357864eac7531484b67613f889def95b7a6deba
2021-12-24 17:16:04 +08:00
Hongjin Li
e53c51e28d video: rockchip: mpp: No need to save qos when making idle requests
Playing mpeg2 video will get stuck at the last position.

The reason is that qos will be saved when vdpu2 is reset.
However, the pd-related clock has been turned off, causing
the read and write registers to be stuck.

However, when pd is switched on and off, the qos will be
saved and restored by itself, and for the 3588 platform,
there is no need to save qos before making an idle request.

Change-Id: I048ed648a97515976f6029a9498080a1ceaa9a2e
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
2021-12-24 17:08:39 +08:00
Finley Xiao
3785bf3a30 driver: rknpu: Add multiple power domain support
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7d2db5b7e269fb62b2c17e6ec1d400b282684ff9
2021-12-24 17:07:19 +08:00
Jianwei Fan
a454f56b96 arm64: dts: rockchip: rk3588s-evb1: add camera sensor configuration
Add lt7911d type-c/DP to MIPI CSI-2 bridge dts configuration as an example

Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: I54c20593358f2632ae9a5006d822664a5972676a
2021-12-24 17:04:55 +08:00
Guochun Huang
28eb6929be drm/rockchip: dsi2: set escape clk 10MHz default
The Escape clock ranges from 1MHz to 20MHz.

Change-Id: I89f8118a4c194cc18f2728968564676e60e4e629
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-12-24 16:43:50 +08:00
Guochun Huang
10c1dd7dfd drm/rockchip: dsi2: set clk no continuous before phy power on
for initial deskew calibration will be send successfully after
phy_power_on when operating above 1.5 Gbps or changing to any
rate above 1.5 Gbps, clk needs to be set to no continuous.

Change-Id: Ia3563f68d3144f05b5095668e0311c61daaea20d
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-12-24 16:40:08 +08:00
Guochun Huang
979ad571b0 phy: rockchip: mipi-dcphy: select default Output Voltage for dcphy
Default Output Voltage selction:
D-PHY: 400mV
C-PHY: 530mV

Change-Id: I9ab4a77373f83bc8ba81b6d6483490707499992d
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-12-24 16:39:54 +08:00
Li Huang
004e0a6e1f video: rockchip: rga3: Fixup the problem that dst offset not taking effect
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I5ae13bdbda7d9f8f22505518f1d9f64ac11d9fa0
2021-12-24 16:34:01 +08:00
Felix Zeng
c2118feabc arm64: dts: rockchip: Add rknpu relative node for rk3588 boards
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: I16ec5078b4e19ed9c62c788541adf8cec848ae6e
2021-12-24 15:13:48 +08:00
Felix Zeng
5a0e89a9bf arm64: dts: rockchip: rk3588: Add rknpu relative node
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: I37de6e34fa56bbb38f20cf14d790118458d45ab5
2021-12-24 15:13:48 +08:00
Algea Cao
e9e2513563 phy: rockchip-samsung-hdptx-hdmi: Reduce hdmi phy power consumption
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I730fbab448ee2c21b55975128ccdf91f23e1dddd
2021-12-24 14:31:50 +08:00
Sandy Huang
8684b99145 drm/rockchip: vop2: power off all vop pd when enter suspend mode
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I992bfdec00e96c9d46681423de44fb512830bb92
2021-12-24 11:34:54 +08:00
Finley Xiao
d6300f380d arm64: dts: rockchip: rk3588: delete RK3588_PD_PHP
As the ITS should always on during operation.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7c8c14c7823c1fcb8d4acc2ac996f984b5103a5c
2021-12-24 10:45:39 +08:00
shengfei Xu
b2d1e578eb input: touchscreen: gt1x: fix the warning when GTP init failed
resolve the warning log below:
[    8.207933][    T9] ------------[ cut here ]------------
[    8.207956][    T9] WARNING: CPU: 4 PID: 9 at drivers/regulator/core.c:2151 _regulator_put+0x10c/0x11c
[    8.207965][    T9] Modules linked in:
[    8.207984][    T9] CPU: 4 PID: 9 Comm: kworker/u16:1 Not tainted 5.10.43 #628
[    8.207993][    T9] Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT)
[    8.208009][    T9] Workqueue: events_unbound async_run_entry_fn
[    8.208024][    T9] pstate: 80800009 (Nzcv daif -PAN +UAO -TCO BTYPE=--)
[    8.208037][    T9] pc : _regulator_put+0x10c/0x11c
[    8.208049][    T9] lr : regulator_put+0x30/0x4c
[    8.208058][    T9] sp : ffffffc0120b3b20
[    8.208067][    T9] x29: ffffffc0120b3b20 x28: ffffffc01091d10c
[    8.208082][    T9] x27: ffffffc01091d100 x26: ffffff8402db2320
[    8.208095][    T9] x25: ffffff8404604100 x24: ffffff8402db2320
[    8.208107][    T9] x23: ffffff8404604100 x22: ffffffc0120b3b78
[    8.208120][    T9] x21: ffffff8404604300 x20: ffffffc011da4550
[    8.208133][    T9] x19: ffffff8404604400 x18: ffffffc012065070
[    8.208145][    T9] x17: 0000000000000000 x16: 00000000000000d8
[    8.208158][    T9] x15: 0000000000000004 x14: 0000000000003fff
[    8.208171][    T9] x13: ffffffc011b8c968 x12: 0000000000000003
[    8.208183][    T9] x11: 00000000ffffbfff x10: dead000000000100
[    8.208196][    T9] x9 : 0000000000000000 x8 : 0000000000000001
[    8.208208][    T9] x7 : 47205d3436353a65 x6 : ffffffc011d93448
[    8.208220][    T9] x5 : ffffffffffffffff x4 : 0000000000000000
[    8.208232][    T9] x3 : 0000000000000000 x2 : ffffff840034a500
[    8.208245][    T9] x1 : 0000000000000000 x0 : ffffff8404604400

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I07e87f6105b71aa9ed571173e4a9a33c1c91bd65
2021-12-24 10:42:37 +08:00
Finley Xiao
16b5587b5f arm64: dts: rockchip: rk3588s: Add cpuinfo device node
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I050cc7f6398500e705b27c588948201e571817ea
2021-12-24 09:43:15 +08:00
Ding Wei
f46b367526 arm64: dts: rockchip: rk3588: set sign off rate for rkvenc clk_core
rkvenc sign off rate:
aclk 600000000
clk_core 800000000

Change-Id: Iaa33160d0b54e898fe5b356347dc44375c3f129f
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2021-12-24 09:19:42 +08:00
Shawn Lin
d41cbb73cb PCI: rockchip: dw: Reduce establish linking time
We kick probe to a kthread so giving a more generous timing would
not be a problem. But given that it's the same routine for resume,
we need more limited timing.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I382bb07ffa389caf854d725c955220c65366cd36
2021-12-23 22:01:27 +08:00
Alex Wang
7a3681fd28 arm64: dts: rockchip: rk3588-nvr-demo-v10-android: disable sata and hdmi1
Signed-off-by: Alex Wang <alex.wang@rock-chips.com>
Change-Id: I40925ed3b755cbb604bc79b556842b164bacbd44
2021-12-23 21:55:30 +08:00
Wang Panzhenzhuan
d4c3c0d2ea arm64: dts: rockchip: add imx415 dtsi for rk3588 evb2
Add dts for imx415 sensor on rk3588 evb2 board.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I71ce4dd5f1fa990abf832d9ed0fa5eb0cc70f5bb
2021-12-23 21:51:17 +08:00
Weixin Zhou
8aa80d1c81 arm64: dts: rockchip: add rk3588s-tablet-rk806-single-v10.dts
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: Icd011b8c1d45707b4714a8fa6ec0b52496c97b69
2021-12-23 21:41:27 +08:00
Weixin Zhou
762807a8b5 arm64: rockchip_defconfig: Enable CONFIG_CHARGER_BQ25890
RK3588s tablet use this feature.

Signed-off-by: Weixin Zhou <zwx@rock-chips.com>
Change-Id: I6fb56940f629530633f5d0acc7fba33350260d8e
2021-12-23 21:41:08 +08:00
Algea Cao
efab7c9ded drm/rockchip: dw_hdmi: SCDC communication is performed only on SCDC supported TV
If SCDC communication is performed on a TV that does not
support SCDC, the I2C bus may become stuck.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I1c1cf926394746dcc198b427a61ffa486ecc99f3
2021-12-23 21:15:44 +08:00
Yu Qiaowei
c398683fd3 video: rockchip: rga2: Fix rotating mmu interruption error.
Since the ARGB format was added without processing the address offset
during rotation, the address offset of mmu was calculated incorrectly.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I6bddd21b50bf60cadf493e73cff10c18210c375c
2021-12-23 21:07:50 +08:00
Jianqun Xu
6a77c1c349 pinctrl: rockchip: rk3588 fix schmitt 8 pins per register
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I756dfd5b42b4fa9e9472a617d68deb4b56ae42a6
2021-12-23 20:19:35 +08:00
David Wu
2c677df5ef ethernet: stmmac: unmap dma buffer after receive data for RX
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Icde5634bfb7d8d71eef08b3ddc20739483cc6316
2021-12-23 20:17:11 +08:00
Algea Cao
b09fc482a2 drm/rockchip: set read only properties immutable
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I22bc515d1605b3bde74f230e96b99cd2ee26dce9
2021-12-23 20:14:38 +08:00
Wyon bi
ce6108c721 drm/rockchip: dw-dp: Use max bpc for color depth limit
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I2ef8d8ba17af50abb4ad3be54e15b5e933ef1e48
2021-12-23 20:10:43 +08:00
Elaine Zhang
9de1cee0df clk: rockchip: rk3588: remove pclk_gpu_root
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I45f7cc56bafc0594eef7cfb6011b1ad912e3ac2e
2021-12-23 20:10:12 +08:00
Elaine Zhang
8e0cd59532 arm64: dts: rockchip: rk3588: remove pclk_gpu
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I68c453689207b3e25ffcaf91920afce7994c6ce6
2021-12-23 20:10:12 +08:00
Zhen Chen
757826e997 MALI: rockchip: upgrade bifrost DDK to g9p0-01eac0, from g7p1-01bet0
In addition, fix a bug of calling KBASE_KTRACE_ADD() too early.

Change-Id: I843f340526275b50ae7d1ec6a7a68963e081e219
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-12-23 19:33:49 +08:00
William Wu
fedba533e2 usb: dwc3: drd: fix device mode for rockchip platform
On some Rockchip platforms (e.g RK3588 EVB2), the USB
interface is Type-A USB 3.0 with vbus always on. In
this case, the USB PHY may fail to send extcon notifier
to dwc3, and the desired_role_sw_mode is uninitialized.
So we need to initialize the desired_role_sw_mode which
depends on the id status during dwc3 probe.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I79074d11773486250cd9ab286eb450826649bfcb
2021-12-23 19:32:33 +08:00
Sandy Huang
3c5901b19d drm/rockchip: vop2: set dsc delay num according to dsc bpp
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I57a2a4a8d07c98ce5fb76aa7364690e171fa2937
2021-12-23 19:08:03 +08:00
Sandy Huang
14b835b916 drm/rockchip: vop2: reset dsc config when exit dsc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Idfe11a25249ab89b73a752c8f48c6c38bc192885
2021-12-23 19:07:59 +08:00
Shawn Lin
830f920f79 phy: rockchip: naneng-combphy: Renew detect bypass reg
Should use REG_19H instead of REG_DH.

Fixes: e6ae079436 ("phy: rockchip: naneng-combphy: Force detect Rx for RK356X and RK3588 SoCs")
Change-Id: Ifc9484e850955e6a36c30755a7ba1aee65070d0f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-12-23 11:43:56 +08:00
Jon Lin
652b70446f spi: rockchip: clear interrupt status in error handler
The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.

Change-Id: Ib215d63d8572e3fc8d843652687e1ebfb7ff531e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2021-12-23 11:35:20 +08:00
Andy Yan
df5f245c28 drm/rockchip: vop2: Make sure previout zpos update take effect before change it
We have the same LAYER_SEL&PORT_SEL register conflicts
issue as rk356x.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I68bf32499b04bba5b0089df2bb473673d9804b90
2021-12-23 11:07:42 +08:00
Andy Yan
29af993b46 drm/rockchip: vop2: Setup dly for vp even there is no plane
We notice there are many POST_BUF_EMPTY irq when user space
enable a video port but without any attached plane.

Setup dly in this situation can avoid the POST_BUF_EMPTY
irq storm.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I907eb1737ac134dda8b2d237584c9d2f2b917b5e
2021-12-22 20:13:52 +08:00
Andy Yan
f925d936cb drm/rockchip: vop2: swap uv for YUV422 8bit/10bit AFBC
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Iba6af8944093201ba84c8fec5deab9eb29265c9e
2021-12-22 20:10:12 +08:00
Sandy Huang
cf58ab4406 drm/rockchip: vop2: rename and correct supported format
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie9b78a26446ce8fc413f2595df6414c1454f03f9
2021-12-22 18:54:35 +08:00
Sandy Huang
3023f3acc5 drm/rockchip: vop2: add support YUYV and UYVY for rk3588
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iecdfa09746389998a9eefef442b2350308c59b14
2021-12-22 16:36:27 +08:00
Yu Qiaowei
e1564ca41b video: rockchip: rga3: Fix rotating mmu interruption error.
Since the ARGB format was added without processing the address offset
during rotation, the address offset of mmu was calculated incorrectly.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I602ebd3bcc9c60fd90103ef50e29e6b9f2a11727
2021-12-22 16:18:33 +08:00
Wang Jie
386d162f92 arm64: dts: rockchip: rk3588s-tablet: fix charger ic output otg current limit problem
At present, the charger ic output otg current limit is 500mA, the
high-current usb device (for example, usb3.0 hard disk) cannot work
normally in Type-C0, such as disconnection and reconnection. According
to the requirements of the usb3.0 protocol, the minimum vbus current
limit is 900mA. We set the charger ic output otg current limit to 900mA,
and the video playback in the usb3.0 hard disk is still unstable.
The rk3588-evb Type-C vbus current limit is about 1.44v, the usb3.0 hard
disk can work stably, so the rk3588s tablet output otg current limit is
configured to 1.5A.

Change-Id: I47bbc6c8f06025504857067d42d780aa783007c6
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2021-12-22 15:50:58 +08:00