Commit Graph

1281539 Commits

Author SHA1 Message Date
Liang Chen
0566ececb0 arm64: dts: rockchip: add RK3566PRO evaluation board devicetree
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: Ie60d07d86193c195ba31798f24776a8573e8a797
2025-06-09 06:23:00 +00:00
Liang Chen
512465e0c0 arm64: dts: rockchip: add core dtsi for RK3566RPO Soc
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I81430bfcce410ddf9205e1b37482b7b869e4f556
2025-06-09 06:23:00 +00:00
Liang Chen
a3995931b6 arm64: dts: rockchip: rk3568: add specification_serial_number for cpuinfo
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: If1c1a23631734c95185591aa3ada1d1879bc0e66
2025-06-09 06:23:00 +00:00
Liang Chen
a2422fd88f soc: rockchip: cpuinfo: Add support for rk3566pro
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I0369c883a3025aad3764b695c8a10dd32b34c83f
2025-06-09 06:23:00 +00:00
Jkand Huang
cd9358989d ARM: configs: rockchip: update rv1126b-wakeup.config
1. enable CONFIG_VIDEO_CAM_SLEEP_WAKEUP
2. enable CONFIG_SND_SOC_RK_DSM
3. enable CONFIG_SND_SOC_ROCKCHIP_MULTICODECS

Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: I162f9727cd8800ed6e82cc4f3da4115dc225c0af
2025-06-07 10:09:33 +08:00
XiaoDong Huang
1337cd6a19 arm64: dts: rockchip: rv1126b-evb1-v10: rockchip_suspend: sleep-debug-en = 1
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I57d48102e35a9b693c19c13121625cd7777183ae
2025-06-06 18:32:29 +08:00
XiaoDong Huang
4153da4ba0 arm64: dts: rockchip: rv1126b: rockchip_suspend: sleep-debug-en = 0
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Ifa0c6165272c10771bb25db588354802ead26308
2025-06-06 18:32:18 +08:00
Ziyuan Xu
9d3d119972 arm64: dts: rockchip: Add rv1126b-thunder-boot for SPI Nor/eMMC
rv1126b thunderboot reserved memory layout:

  H
		 _______________________
		|			|
		|	ramdisk_c	|
		|_______________________|
		|			|
		|	ramdisk_r	|
 0x48c40000	|_______________________|
		|			|
		|        mcu_log	|
 0x48c3c000	|_______________________|
		|			|
		|         mcu		|
 0x48c00000	|_______________________|
		|			|
		|     [TEEOS+TA+SHM]	|
 0x48400000	|_______________________|
		|			|
		|	mmc_escd	|
 0x48000000	|_______________________|
		|			|
		|	mmc_idmac	|
 0x47fffe00	|_______________________|
		|			|
		|    isp[0..1]_tb_rmem	|
		|_______________________|
		|			|
		|         meta		|
 0x41240000	|_______________________|
		|			|
		|	   fdt		|
 0x41200000	|_______________________|
		|			|
		|	kernel_r	|
 0x40208000	|_______________________|
		|			|
		|	   bl31		|
 L		|_______________________|

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I69f4dcbf94d6a646794e993ad7dac0e94028ed47
2025-06-06 09:06:11 +00:00
Leo Sun
7cd68dc911 media: rockchip: sc850sl: Support for 40 frame rates
Change-Id: Idbaef7b7b9a1286b08733dc20e3200ae9266265f
Signed-off-by: Leo Sun <leo.sun@rock-chips.com>
2025-06-06 07:51:04 +00:00
Jkand Huang
04054a0ea7 arm64: dts: rockchip: rv1126b-evb2-v10: sc485sl enable hw_standby
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: Ie12fe2c2abacafcd54ead55a0b543fa028e08fa2
2025-06-06 07:49:47 +00:00
Cai YiWei
58b5fd106b media: rockchip: isp: fix sequence error correction
Change-Id: I35ea43335f3475a8ddb2dafb25201a7523d9457e
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2025-06-06 09:55:04 +08:00
Algea Cao
1de9a23c54 drm/rockchip: vop2: Fix the abnormal brightness when post-csc is enabled
If all planes are in rgb format and are in yuv overlay, r2y
conversion is all carried out in bt601. In this scenario, the
input colorspace of post-csc needs to be selected as bt601.

Fixes: 2e4cd35f06 ("drm/rockchip: vop2: update color-encoding selection policy for post-csc")
Change-Id: I2311fe8b0edb3ad44fe98231e723e895df1a3d69
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2025-06-05 07:39:13 +00:00
Wei Dun
9adbfafceb media: rockchip: vpss: reset sw_vi2enc_sel on dvbm deinit
Signed-off-by: Wei Dun <willam.wei@rock-chips.com>
Change-Id: Ia74755db4cba45f74d2108240f8054856ed29d38
2025-06-05 07:18:49 +00:00
Algea Cao
21ccc2dfe7 arm64: dts: rockchip: rk3588-evb: Use the hdmi phy pll dynamic allocation mode
If the vp dclk clock source corresponding to hdmi is not the
corresponding hdmi phy pll, that resulting in abnormal display
of some resolutions. Furthermore, the use of hdmi phy pll can
support more non-standard resolutions.

Change-Id: I7a39ab2d73e912c596d8e1720d251e89c30b1f3b
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2025-06-03 10:20:30 +00:00
Wei Dun
46bdb508e2 media: rockchip: vpss: fix ch5 output issue
Signed-off-by: Wei Dun <willam.wei@rock-chips.com>
Change-Id: Iacd285be0f36d9360eaba776e21b4efe6bc633c9
2025-06-03 10:12:25 +00:00
Wei Dun
907fb7fa62 media: rockchip: vpss: reduce rockit buf vmap
Signed-off-by: Wei Dun <willam.wei@rock-chips.com>
Change-Id: I271c2a056fccb6b16f08bfa1f56a1c668cc3b87d
2025-06-03 10:12:21 +00:00
Johnson Ding
994be34daf video: rockchip: mpp: rkvdec2: Fix reg reading
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
Change-Id: I9dbc24bc1f577f72535dbd42c6d05ca24b0d2e63
2025-06-03 09:52:36 +00:00
Jon Lin
3791b78401 misc: rockchip: pcie-rkep: Fix mutex lock not released in pcie_rkep_release
Change-Id: I4be295e6efb7509fc5b0d1610f2f6b2c480bbf5d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2025-06-03 09:09:04 +08:00
Jon Lin
f803534f3e phy: rockchip-snps-pcie3: RK3588 phy lock determines compatibility with all bifurcation situations
Change-Id: I34d720cab1a949bb1f518674d85bcb0d81d40062
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2025-06-02 22:50:37 +08:00
Yu Qiaowei
8597ef189a video: rockchip: rga3: adapt to kernel-6.12
Change-Id: I2770caf4f4363cce36cae4f8cfbb0be9d322e82b
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
2025-06-02 06:55:54 +00:00
Alex Zhao
3515a9f56b net: r8168: update r8168 driver to v8.055.00
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Change-Id: I70c1788eb070ff4eab9aba51a2e52f95f4ab9d01
2025-06-02 06:25:32 +00:00
Zefa Chen
438259ec8c media: rockchip: vicap fixes error use_count for switch device mode
Fixes: 4f7e1db593 ("media: rockchip: vicap support use switch device to switch sensor connect to one dphy")
Change-Id: Ieeca97ae618c50e8710c506c24391740092d61b3
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
2025-05-30 11:36:41 +00:00
Zefa Chen
467befa859 media: rockchip: vicap fixes error start stream of aov for rv1126b
Change-Id: Ib1406393488ec3c9ca39d942d2e69ed6c06299b7
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
2025-05-30 11:35:13 +00:00
Zefa Chen
026cc864c0 arm64: dts: rockchip: rk3562: remove unnecessary references to rkcif_mmu
Change-Id: I29f149b9c22d7eef4144c0b7f10717233416ce99
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
2025-05-30 11:34:44 +00:00
Yu Zheng
70d8930ab5 arm64: dts: rockchip: rv1126b-evb-cam-csi0: add imx586 support
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I7853c95b97ed70bea5c284fa4994c2d01f6d1d3f
2025-05-30 11:33:58 +00:00
Yu Zheng
8ffb28b34f ARM: configs: rv1126b-evb: enable imx586
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I8ddfbf33ca2867209796fcc2154d4ddd770faf43
2025-05-30 08:52:20 +00:00
Jake Wu
63c77a77de arm64: dts: rockchip: rk3588-evb7-v11: support usbhost3.0
Change-Id: I7ac5f41798e5333e1473560c0a0355dfb09091cd
Signed-off-by: Jake Wu <jake.wu@rock-chips.com>
2025-05-30 08:49:56 +00:00
Yu Zheng
75da3224ff iio: imu: inv_icm42670: fix dead lock when resume
Signed-off-by: Yu Zheng <yu.zheng@rock-chips.com>
Change-Id: I1aae323d4ee49abcff374d80e3611da2f5c7c023
2025-05-30 08:49:26 +00:00
Liang Chen
27e9662f0c video: rockchip: mpp: rkvenc2: add governor and device for devfreq
Change-Id: Ie92f2a0795359201a77fac4a3446a7c8e1b8e897
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-05-30 08:38:45 +00:00
Finley Xiao
c9478f44f8 thermal: rockchip: Remove npu thermal for rv1126b
Change-Id: Id90719ccc5d67efb173869febacc86962621e159
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-05-30 08:29:19 +00:00
Finley Xiao
7a4d6cb92d arm64: dts: rockchip: rv1126b: Remove npu thermal
Change-Id: Ie1e29b9abc8d483df644b82a4f267b72acaa5216
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2025-05-30 01:23:19 +00:00
Yandong Lin
bb98340ac5 video: rockchip: mpp_osal: Add func to get dma iommu mapping
Change-Id: I9c728c8b8048c16cdf85aa421a1192b11f53500c
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
2025-05-29 08:40:59 +00:00
Liang Chen
8ec30319e0 arm64: dts: rockchip: rv1126b: add opp-510M/600M for npu
Change-Id: I710aef8f78019c264409d0eef79d57d31f34b4a4
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-05-29 07:39:27 +00:00
Liang Chen
e4c86a01fd clk: rockchip: clk-pvtpll: add 510M/600M frequency point for rv1126b npu
Change-Id: I2177603835eada713f465175311fcd06ad6fd9cf
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-05-29 07:39:23 +00:00
Jon Lin
513192ee16 arm64: dts: rockchip: rk3528: Remove pcie2x1 SRST_PRESETN_CRU_PCIE reset
This reset needs to be always on, and is always on by default, so it
should not be referenced. Otherwise, once PCIe fails to enumerate the
enumerate successfully, it will be closed, which will affect other
controller that do not reference this.

Change-Id: Ie654c0c071006bd0006039286bd22acaec30df10
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2025-05-29 06:38:53 +00:00
Jkand Huang
2418a7d538 arm64: dts: rockchip: rv1126b-evb1-v10: Adapt the PMU IO states for the sleep mode
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: I505dea64649a0eefb604a8c8f76d6e9ff325982a
2025-05-29 06:26:53 +00:00
Ziyuan Xu
1f258c4eec arm64: dts: rockchip: rv1126b-evb3-v10: Add rtc/rockchip_suspend support
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I85b04227b0410307f02c81f5522c741cae234504
2025-05-29 06:26:32 +00:00
Weiwen Chen
0adfff2bee arm64: dts: rockchip: rv1126b: Add label to reserved-memory node
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I7d9246f7724f450e9ca59518c952d74d03ed5723
2025-05-29 06:25:59 +00:00
Jkand Huang
4d942ec2d1 arm64: dts: rockchip: rv1126b-evb2-v10: Resolve the leakage issue in sleep mode
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com>
Change-Id: I0babc67fcf01b0a5166d3c26cb6600636e4f3107
2025-05-29 06:23:35 +00:00
LongChang Ma
b5d1812d54 media: i2c: sc850sl: add support hw standby
Signed-off-by: LongChang Ma <chad.ma@rock-chips.com>
Change-Id: I54b75f77c8b8a093f04640c402381bea39460006
2025-05-29 06:23:09 +00:00
Xu Xuehui
fa17e4b1d3 PCI: disable L0s for CYW989459 Wireless Module
Change-Id: Ie5eaf0306ac5b571a7d051d8b6c1bee615776c3a
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
2025-05-27 19:23:52 +08:00
Weiwen Chen
97098d2d1b ARM: configs: rv1126b-fastboot: Enable CONFIG_VIDEO_ROCKCHIP_VPSS
Update by:
  make ARCH=arm rv1126b_defconfig
  cp .config tmp.config
  make ARCH=arm rv1126b_defconfig rv1126b-fastboot.config
  make ARCH=arm menuconfig
  ./scripts/diffconfig -m tmp.config .config > arch/arm/configs/rv1126b-fastboot.config

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie2ed04961989df3bb3fae9b601e4db480c53eb12
2025-05-27 19:23:52 +08:00
Luo Wei
8d69344a2a arm64: dts: rockchip: rk3576-vehicle: add ufs dts support
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Ibf541493488f5c2565dfdddeacf39cae91d8b29a
2025-05-27 19:23:52 +08:00
Liang Chen
72d459a462 arm64: dts: rockchip: rk3576-cpu-swap: add cache info for A53
Change-Id: Ib1908adacedb69836159179f8226d6a4e0202550
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-05-27 19:23:52 +08:00
Liang Chen
424135148b arm64: dts: rockchip: rk3576: add cache info for A53/A72
Change-Id: I984f5ecc8450186822290846a526ae0929bc9035
Signed-off-by: Liang Chen <cl@rock-chips.com>
2025-05-26 16:55:17 +08:00
Yu Qiaowei
ff148eedd4 video: rockchip: rga3: RGA2 scale mode add default config
When the task is not submitted from the librga im2d API, the scale mode
may be default, so additional default configuration is required.

Change-Id: Ie5966308ad1af09a6a7eec489126670dc1085dac
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
2025-05-26 08:29:16 +00:00
Ye Zhang
b7b90f1ca9 pinctrl: rockchip: refine drive strength levels for RV1126B
This commit has refined the driver strength configuration of the RV1126B
from 6 levels to 23 levels

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: I61cee294cbb194366909acc70dec3d41a0a1e961
2025-05-26 02:39:29 +00:00
Ye Zhang
4502ce6f66 arm64: dts: rockchip: add dedicated pinconf DTSI for RV1126B
This commit introduces a chip-specific pinconf DTSI for RV1126B to handle its
extended drive-strength levels. New levels add intermediate level. Below is
the migration guide:

Old Level to New Level Mapping (Same Register Value):
-----------------------------------------------------
| Old Name      | New Name              | Register  |
|---------------|-----------------------|-----------|
| drv_level_0   | drv_level_0_25        | 0x01      |
| drv_level_1   | drv_level_0_75        | 0x03      |
| drv_level_2   | drv_level_1_75        | 0x07      |
| drv_level_3   | drv_level_2_75        | 0x0F      |
| drv_level_4   | drv_level_3_75        | 0x1F      |
| drv_level_5   | drv_level_5_75        | 0x3F      |
-----------------------------------------------------

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: Ic15ba802bdeac765c684d6906047523d914d01b1
2025-05-26 02:39:29 +00:00
Shawn Lin
cd348ae871 PCI: rockchip: dw: Fix link fail in s2r
Delaying link training need the irq to help set dly2_done which couldn't
come true in resume due to the noirq phase. If the training is still going
but the EP issues a hot reset request, the LTSSM will be stuck and the
link never be back even if we reset the EP. The only way is to reset the
whole controller, which is unacceptable.

The issue is very difficult to be reproduced but finally we spot the key
point from fifo status of ltssm. From the designe point of view, the only
way to make ltssm from 0x0(DETECT_QUIET) to 0x5(PRE_DETECT_QUIET) is
core_rst_n be active and dly logic taking over client settings.

[816669.085768][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xf0009
[816669.085775][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xe000a
[816669.085783][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xd000b
[816669.085790][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xc000c
[816669.085797][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xb0011
[816669.085804][ T2707] rk-pcie fe180000.pcie: fifo_status = 0xa000d
[816669.085811][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x9000f
[816669.085818][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x8000e
[816669.085826][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x107000d
[816669.085833][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x106000e
[816669.085840][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x5000d
[816669.085847][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x40005
[816669.085854][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x30000
[816669.085861][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x20005
[816669.085868][ T2707] rk-pcie fe180000.pcie: fifo_status = 0x10000

Given dly2_done is slef-clear bit, so we can't set it in advance but have
to disable dly2_en when linking in resume and enable it later.

Fixes: 679557456b ("PCIe: dw: rockchip: Delaying the link training after hot reset")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I85c24c7d7ea4c5f6718bcbdfbd7bf328d9a7f170
2025-05-26 02:39:05 +00:00
Algea Cao
98c569358a phy: rockchip: inno-hdmi: Subdivide rk3528 phy cfg table
Add phy configuration of tmds clk corresponding to 10-bit color
depth at different resolutions (such as 1080p60 10-bit).

Change-Id: I8792d950dca2a51572314359044c2bea437a71a8
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2025-05-26 02:35:00 +00:00