PD#161992: amvecm: fix DNLP node doesn't work when play local 4k viedo
Change-Id: I38228ebf18127335529e2bca1679f5bb98d22863
Signed-off-by: wenfeng.guo <wenfeng.guo@amlogic.com>
PD#161350: hdmitx: add colorimetry feature to vpp
Some special TVs just define HDR static Metadata,but don't
define colorimetry block. Therefore, hdmitx should use
another feature to accurately indicate HDR function
Change-Id: I8d9a9243c2e0fbcf8c938625aa8d2a20b1441a1b
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#156734: add EMP (any packets) function for test
The function is only used to test now. The details need to
be discussed in the feature.
method:
echo emp > /sys/class/amhdmitx/amhdmitx0/config
Change-Id: I73cf93d90c9247336340fdc36ae8779743dc262d
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#156734: PM/sleep: modify register's dts format for suspend.
Change-Id: I8dd1f8927e3d5b2d0f815e732dc0c436ffd2fde9
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
PD#159303: this may cause the suspend to ram crash at mali modules
Change-Id: I57a9a83306a4f04619e5c0ebfd0bf5ab15dcb804
Signed-off-by: Jiyu Yang <Jiyu.Yang@amlogic.com>
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
PD#156734: add s905d2_u200 and s905y2_u221 for g12a
1. rename g12a_skt.dts to g12a_s905d2_u200.dts
2. cp g12a_dts.dts to g12a_s905d2_skt.dts, and change caps and
f_max for sd_emmc_a
3. cp g12a_skt_buidroot.dts to g12a_s905d2_skt_buildroot.dts, and
change caps and f_max for sd_emmc_a
4. cp g12a_skt.dts to g12a_s905y2_u221.dts, disable ethmac
5. cp g12a_skt.dts to g12a_s905y2_u211.dts
6. set f_max for sd_emmc_c to 50000000
Change-Id: Iffbeffc6dd730cff1c5ac371e237edcc8354b042
Signed-off-by: jianxin.pan <jianxin.pan@amlogic.com>
PD#161202: recycles the vf data before must to be checked.
Change-Id: Ief413c5169d859be632f4799d6897ae1322e2fbb
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
PD#161757: improvers the regs ops to prevent crash duo to bus type err
Change-Id: Id5f7648de84d55700d7c240b32e988363ffb9ef7
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
PD#156734: move g12a common parts from dts to dtsi
Change-Id: I67476217b44774c1645da5482d8c7e43ac91ae7e
Signed-off-by: jianxin.pan <jianxin.pan@amlogic.com>
PD#156734: audio: auge: add alsaPORT suffix name for android audio hal
Change-Id: Ie442dc27c594caf0181425e66fe555c1bd5355ba
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
PD#156734: vpp: disable pps as default when scaler ratio is 1:1
Change-Id: I5ff2a9a1089461c92996066e0cec4379a5d509e4
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#161570: di: fix black screen in hdmi 1080p mode
1) fix r321 black screen in hdmi 1080p mode
2) add debug info for recovery mode
3) move pre hold ratio configuration into pecial function
Change-Id: I6e482505da6f3621a1934f600cedcec4341e0743
Signed-off-by: kele bai <kele.bai@amlogic.com>
PD#161621: gpio: core: Decouple open drain/source flag with active low/high
Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.
The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.
In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.
In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.
With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.
Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.
Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.
Note: the patch from v4.14-rc6 with original commit ID 4c0facddb
Change-Id: I2f652614d3783caee3f510dc70e5e185379f49a7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
PD#159810: mtd: change the block number of RSV member into macro
in case of customer want change the RSV part size, we'd better
make the block number of every part be a macro, in case miss modified
in somewhere.
Change-Id: I75e665cc3efd8b4bf4ad5a0843f855d4915ae180
Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
PD#156734: gpu: set up gpu max freq to 850MHz
Change-Id: I96d9c9beddd4c5e723fe4c4790c7ce99aeebc1e6
Signed-off-by: binqi.zhang <binqi.zhang@amlogic.com>
PD#158989: mtd: add a new slc nand and avoid the 2nd column in some command
new slc nand: F59L1G81MB (2M)(same id with F59L1G81MA (2Y),
called a joint name of F59L1G81Mxxx).
We do not send the 2nd column in some command such as: read id,
read parameter etc
Change-Id: Ibeac872231c880efde8a38e6344c326043e7d7dc
Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
PD#156734: cpufreq: fix cpufreq system halt for reboot.
Change-Id: I5c12a58b2fa53ef4c22a7032572983bf566b19b7
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
PD#161257: fix g12a pll enable ops mutex in in_atomic
Also fix mpll setting range
Change-Id: I0a3acfbfd111d48f3b31c8f068294c1714ad2886
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
PD#156734: di: fix post write crash for pps enabled in post
1) diable post wirte in post write done irq to avoid
pps send data to fifo
Change-Id: I758be72a2fb2c17b731a7575f24a75bc44c5e816
Signed-off-by: kele bai <kele.bai@amlogic.com>
PD#161104: adds the register ops for media codec io efuse bus
Change-Id: I6fc625848442754b089428fd8cb10a3047fa4062
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
PD#160530: porting hard lockup without nmi support
Emulate NMIs on systems where they are not available by using timer
interrupts on other cpus. Each cpu will use its softlockup hrtimer
to check that the next cpu is processing hrtimer interrupts by
verifying that a counter is increasing.
This patch is useful on systems where the hardlockup detector is not
available due to a lack of NMIs, for example most ARM SoCs.
Without this patch any cpu stuck with interrupts disabled can
cause a hardware watchdog reset with no debugging information,
but with this patch the kernel can detect the lockup and panic,
which can result in useful debugging info.
Change-Id: I720032cbec78c79d8b4accacc01f183c70e5d403
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
PD#156734: optimise the clock divider of VID_PLL_DIV
This is a bridge of analog signal and digital signal module.
With VCO output 4.455Gbps/2160p60hzY420 12bits mode and the
ENCP needs 594MHz, there should divide half to reduce the
risk of HHI_VID_PLL_CLK_DIV.
Change-Id: If6965d64df1aa4b7cb4a8dd66847db3d5d17aea7
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
