Commit Graph

1073059 Commits

Author SHA1 Message Date
wlq
276bad482b arm64: dts: rockchip: px30: disabled uart dma
Change-Id: I1a1343459c0a67393d22be3101cd8d269a2f26f0
Signed-off-by: Wuliangqing <wlq@rock-chips.com>
2022-11-19 15:45:53 +08:00
Finley Xiao
57b8f4d774 clk: rockchip: rk3036: leave apll for core, mac and lcdc only
In order not to affect other clocks, remove the apll from the
parent list of other clocks and only core, mac and lcdc can
select apll as parent.

Change-Id: I58b995f8ccf69c6564f74b5823f618a186030d70
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2022-11-19 15:44:53 +08:00
David Wu
8b37dde38e ARM: dts: rockchip: rk3036: Keep the pwm pins default pull state
In order to ensure the accuracy of PWM voltage regulation, keep
the pull state of PWM consistent with the default; The pull state
has little effect on other case such as output mode.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I4d4813a9426e45a1c3f3690603b63c57addcdb73
2022-11-19 15:42:23 +08:00
Steven Liu
99f754dcaa Revert "ARM: dts: rockchip: Fix UART pull-ups on rk3036"
This reverts commit eb04688f6f.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: Ifbc43c2b6ba476fcc3c50c71b21b05aee4dd91c4
2022-11-19 15:38:27 +08:00
Steven Liu
7a35e84b14 Revert "ARM: dts: rockchip: Fix UART pull-ups on rk3066a"
This reverts commit dd2f0befb2.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I6efc99eea9740888fa0b7b311435c394381c7d9f
2022-11-19 15:38:27 +08:00
Steven Liu
f340fd1bf0 Revert "ARM: dts: rockchip: Fix UART pull-ups on rk312x"
This reverts commit 026248a29f.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I71c65cee85fbe72b7bb6aefbf610cb2e6264ec3a
2022-11-19 15:38:27 +08:00
David Wu
54162171af net: phy: rk630phy: Add agc offset for initial flow
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ibea8e37f7cf6e462ef281981c2529b6126287b9f
2022-11-19 15:34:50 +08:00
XiaoDong Huang
9cc95efeb5 PM / devfreq: rockchip_bus: add support for rk3588
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: If03fa9331168187dabf6f97cc38354f0b560fc1c
2022-11-19 15:26:03 +08:00
XiaoDong Huang
8fedbbb946 PM / devfreq: rockchip_bus: support parse soc-bus-table
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I76ff30103cfa93289b9ecde0d95f42f960284e9b
2022-11-19 15:26:03 +08:00
Shuangjie Lin
1cde5fb12c driver: rknpu: Fix system interrupt signal cost rknpu wait error
Using wait_event_timeout() replace wait_event_interruptible_timeout().

Change-Id: I53481d25cb96a86a6262672bb65e9a2ed942164a
Signed-off-by: Shuangjie Lin <shuangjie.lin@rock-chips.com>
2022-11-19 15:00:55 +08:00
Yiqing Zeng
70de50acbb ARM: dts: rockchip: support ov13850/gc8034 for rk3288-evb-rk808-linux
Change-Id: I84c7e782a99270a29de0976b97784ccc73b35bad
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
2022-11-19 14:39:21 +08:00
Yiqing Zeng
14a26d6f6b ARM: configs: rockchip_linux_defconfig: add gc8034 config
CONFIG_VIDEO_GC8034=y

Change-Id: I44c5cf192936f668a9b3c9322136781070435e48
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
2022-11-19 13:19:22 +08:00
Yiqing Zeng
7cfaa4a10f ARM: configs: rockchip_linux_defconfig: enable rkisp1 config
CONFIG_VIDEO_ROCKCHIP_RKISP1=y

Change-Id: I11f913c8f04efd2eb53fb63d5ebe24c0e072d915
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
2022-11-19 12:05:08 +08:00
Jianqun Xu
e733a7a8b3 clk: rockchip: fix to SIP_V2 for rk3288
Fixes: d2b92a90ea ("clk: rockchip: support setting ddr clock via SCPI and SIP Version 2 APIs")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I7521443f50dbe3049fd8a08c769a74f5e364334a
2022-11-19 11:59:55 +08:00
Jianqun Xu
a6a8f8d0a3 clk: rockchip: rk3288 set aclk_peri_niu as critical
Fixes: 938e2f2261 ("clk: rockchip: drop use of rockchip_clk_protect_critical()")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I65b4dd2f380d30d7638212234ff23dc17e2d4349
2022-11-19 11:55:47 +08:00
Sugar Zhang
70e4176f1c ARM: dts: rockchip: rk3288-evb: split i2s mclk pinctrl from i2s bus
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If9c2d2fdedbc2673b2fe0e6738ed8fb54c98a0ba
2022-11-19 11:50:52 +08:00
Sugar Zhang
cdea157c04 ARM: dts: rockchip: rk3288: split i2s mclk pinctrl from i2s bus
because currently mclk is handled by codec side, so the
associated pinctrl should be handled by codec too.

Change-Id: I0611b7a291351a20f72b5124c501dc79d92787d6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:50:13 +08:00
Lin Jinhan
8c99ad8b0f ARM: dts: rockchip: rk3288-linux: Enable rng node
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I581f17e04b20493c979b275b1b8624a0af7809c9
2022-11-19 11:44:49 +08:00
Lin Jinhan
d3593fabde ARM: dts: rockchip: rk3288: add rng node
rng node is compflict with crypto node, so default disable
rng node and crypto node.

Change-Id: I9a28108a5667f88c15d5cc9916d927115cdb8918
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:44:03 +08:00
Jianqun Xu
0a4c984ad0 ARM: dts: rockchip: rk3288: fix 'gpu_thermal' to 'gpu-thermal'
The midgard reports a error about the thermal zone as following:

[    6.242958] midgard ffa30000.gpu: GPU identified as 0x0750 r1p0 status 0
[    6.249761] midgard ffa30000.gpu: Protected mode not available
[    6.255837] midgard ffa30000.gpu: l=-2147483648 h=2147483647 hyst=0 l_limit=0 h_limit=0 h_table=0
[    6.264833] Error -19 getting thermal zone 'gpu-thermal', not yet ready?
[    6.271551] midgard ffa30000.gpu: recalculation of power model mali-simple-power-model returned error -517
[    6.281210] midgard ffa30000.gpu: IPA initialization failed
[    6.281333] devfreq ffa30000.gpu: Couldn't update frequency transition information.
[    6.294566] midgard ffa30000.gpu: Continuing without devfreq
[    6.300568] midgard ffa30000.gpu: Probed as mali0

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I6ff5a0bd5679e7b7c3b657c475b0a788eb03f24a
2022-11-19 11:41:54 +08:00
Liang Chen
25e9b5b53a ARM: dts: rockchip: delete gpu 100MHz for rk3288
100MHz will hurt performance when app startup.

Change-Id: Ia55a5f53b101559b9d6b94ca98609f7072df6d86
Signed-off-by: Liang Chen <cl@rock-chips.com>
2022-11-19 11:41:22 +08:00
Finley Xiao
89c19af784 ARM: dts: rockchip: rk3288: Add performance configuration for gpu
Change-Id: Iac51c59395c3111d267b50aea69a2704442def1b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:40:39 +08:00
Jianqun Xu
723f0eabf6 ARM: dts: rockchip: rk3288-evb add support for GSL3673
GSL3673 is a touchscreen device, let support it.

Change-Id: I4bf302c395491ca49a1874c8984caa0b49cfb326
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:38:08 +08:00
Jacob Chen
641b252347 ARM: dts: rockchip: rk3288-evb enable high speed on sdcard
Change-Id: Idd855fb565dde2e47891f6676175c6573c245fcd
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:37:43 +08:00
Jianqun Xu
6e89c6ee15 ARM: dts: rockchip: rk3288-evb disable uart 1/3/4
Uart3 has been iomux to gpio, for vcc_3g regulator, which is designed
on rk3288 evb main board.

Disable unused uarts to fix gpio request blame during system booting.

Change-Id: I2eb79ae63a6f226255c12fc3da9ba95ec4219d32
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:36:35 +08:00
Nickey Yang
13155994fc ARM: dts: rockchip: rk3288-evb support AP6335 wifi and bt
This patch add and enable AP6335 wifi node for rk3288-evb

Change-Id: I49e7f6a67130a105579627d30db55010967da57a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:35:29 +08:00
Jianqun Xu
dcb9d29dbf ARM: dts: rockchip: rk3288-evb add rockchip-relinquish-port quirk for ehci
This adds force abnormal ohci relinquish port owner
and back to ehci on rk3288 SoC.

Change-Id: I33be55c08762be7e8a239f741a8c8dbb28522306
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:34:27 +08:00
Jianqun Xu
bc82ddeea8 ARM: dts: rockchip: rk3288: add alias for dsi0 and dsi1
Fixes: 69870f9db0 ("ARM: dts: rockchip: rk3288: fix display related nodes")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ie929fa6ef965bf69ad1e0b4eb383535352068f84
2022-11-19 11:33:18 +08:00
Jianing Ren
674536165c ARM: dts: rockchip: rk3288: Add otg-bvalid interrupt
Change-Id: Id652b5ba4c16f8a53cc5bee9cd50fecfacff45c1
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2022-11-19 11:32:31 +08:00
Finley Xiao
3673d0a600 ARM: dts: rockchip: rk3288: Assigned i2s_src parent to GPLL
The default parent of i2s_src is 200MHz CPLL, it doesn't meet
the constraint of fractional divider that denominator must be
20 times larger than numerator.

Change-Id: I986525ca7a92cb5883facd1b6e89079398302856
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-19 11:31:12 +08:00
Frank Wang
bcb9689220 ARM: dts: rockchip: rk3288: Add utmi clock for ehci and ohci
This change adds USB-PHY output clock reference for EHCI and OHCI.

Change-Id: I39e91fed99756a86c83fe9332587c6630a5e5853
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:24:44 +08:00
Jianqun Xu
043ddfca3f ARM: dts: rockchip: rk3288: add operating-points-v2 for cpu nodes
Merge the pvtm patch to this patch.

Change-Id: I3cb938fbfaf0ae5957d4832f4ad5671ab9631409
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:22:54 +08:00
buluess.li
3ad628c268 ARM: dts: rockchip: rk3288: add iep node
Change-Id: Ie7fe0bbc91a5fedb0617d9b6c6056bdb4aed610d
Signed-off-by: buluess.li <buluess.li@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:19:24 +08:00
Rocky Hao
212d266625 ARM: dts: rockchip: rk3288: Assign tsadc clock to 5 KHz
Add tsadc's working clock rate for rk3288. if not set, tsadc
will work at the default rate of 1k hz.

Change-Id: I1b26351c3fb97f5ceb4657c2356c2f5649ad140c
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:16:23 +08:00
XiaoTan Luo
5c12a1263c ARM: dts: rockchip: rk3288: add spdif_2ch node
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Id0abf6748053cbf0666f20c28fd68bbf9c3f2086
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:11:17 +08:00
Jianqun Xu
a6202ba721 ARM: dts: rockchip: rk3288: fix to timer0 for broadcast timer
Change-Id: I0dd9a367c2587391b17ab9bb3a4610abdee14816
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:09:57 +08:00
Finley Xiao
9ee437dc1d ARM: dts: rockchip: rk3288: Change 400MHz to 420Mhz for gpu
It doesn't support 400MHz, but support 420MHz.

Change-Id: Ife31469307912f83919b02b532acde91cc0f19ce
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 11:04:04 +08:00
Jason Song
dff006bcf0 ARM: dts: rockchip: rk3288: fix uart pinctrl to pullup
Change-Id: Ia1d5af0a3fadf9f8649df664aef2e6f3d862d778
Signed-off-by: Jason Song <sxj@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 10:58:49 +08:00
Allon Huang
853742ebfe ARM: dts: rockchip: rk3288: Add csi_host and cif_pin
Change-Id: I43f289d3de897ef16098639a57b140c9554de3cd
Signed-off-by: Allon Huang <allon.huang@rock-chips.com
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 10:58:02 +08:00
xcq
0b16181d0a ARM: dts: rockchip: rk3288: Add isp config
Change-Id: I00883343c8addff1adc71bef5001d3064b829d97
Signed-off-by: xcq <shawn.xu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 10:55:34 +08:00
William Wu
0fce242c01 ARM: dts: rockchip: rk3288: Fix reg size for ehci
According to rk3288 TRM, the size of usb ehci is 128K,
so let's fix it in dts.

Change-Id: I1adf02080033906a88b34cae877bb84ad0f63059
Signed-off-by: William Wu <william.wu@rock-chips.com>
2022-11-18 10:52:23 +08:00
Elon Zhang
e5611037e8 ARM: dts: rockchip: rk3288: Add firmware and optee node
Add optee node to supply OP-TEE required properties.
/optee node is supposed to be below /firmware node.

Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I067f12319a2ec3252655669b199ced6ab451cbd9
2022-11-18 10:51:57 +08:00
Jianqun Xu
e7be6c1a29 ARM: dts: rockchip: rk3288: add rockchip-suspend node
Change-Id: Id5700548a6034248ed5ad3226dd652d0833eec13
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 10:51:27 +08:00
Jianqun Xu
d906b21832 ARM: dts: rockchip: rk3288: Add SCLK_HDMI_CEC to PD_VIO
Change-Id: I6de8283516f01093213ea16f0792bcd10fb1af2b
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-18 10:49:06 +08:00
Jianqun Xu
a4a177f736 ARM: dts: rockchip: rk3288-evb enable sound with rt5640
Change-Id: Ibe3f218f9b3283c82329500486fd73298fc3b0d6
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-11-17 18:07:13 +08:00
Jianqun Xu
9903fc2377 ARM: dts: rockchip: rk3288-evb-rk808-linux add wifi_enable_h pinctrl
DTC     arch/arm/boot/dts/rk3288-evb-rk808-linux.dtb
arch/arm/boot/dts/rk3288-evb-rk808-linux.dts:87.27-101.4: ERROR (phandle_references): /sdio-pwrseq: Reference to non-existent node or label "wifi_enable_h"

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I14eb634ed8823e4caef581b8974a5dded63f5d8e
2022-11-17 18:07:13 +08:00
Jianqun Xu
f1d80296b4 ARM: dts: rockchip: rk3288-evb-rk808-linux fix to hdmi_cec_c0
DTC     arch/arm/boot/dts/rk3288-evb-rk808-linux.dtb
arch/arm/boot/dts/rk3288.dtsi:1433.22-1463.4: ERROR (phandle_references): /hdmi@ff980000: Reference to non-existent node or label "hdmi_cec"

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I976f1ea4d9ee796ce1c179f5dfead625c257f8af
2022-11-17 18:07:13 +08:00
Jianqun Xu
1f38917aeb ARM: dts: rockchip: rk3288: fix base address for i2s to 0xff8b0000
This patch fixes the error base address for the i2s controller from
0xff88b0000 to 0xff8b0000.

Also order the i2s node by mapping address.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I613eaf64ee010c41208f1c8169e55efbf39fd34c
2022-11-17 18:07:13 +08:00
Yifeng Zhao
4ba9bb2228 drivers: rk_nand: fix compile warning
warning: drivers/rk_nand/rk_ftlv5_arm32.o uses 4-byte wchar_t yet
the output is to use 2-byte wchar_t;

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I9ea1cdb05be5e4edb297517a9ae8c5e5377538be
2022-11-17 16:46:48 +08:00
Jianwei Fan
3f98f91c6f arm64: dts: rockchip: rk3326-evb-lp3: remove pinctrl dvp_d0d1_m0
In rk3326-evb-lp3-avb, gpio2_b6 is used for CAM_PDN0 instead of cif_data1.

Change-Id: I926474f2b06cc39052997750eb1894a8b0fe04d7
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
2022-11-17 16:42:47 +08:00