Since GKI disables closing fd in the kernel, the acquire fence fd should be
closed in user-space.
Update driver version to 1.3.0
Change-Id: I9bf85d6a39b3564332fc00dc9fce01678dc1ce3b
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Add driver to support TDA7803 amplifier devices.
Change-Id: Iceb83a801d7a9f4a7faa7b7617be63f93c57be76
Signed-off-by: Jun Zeng <jun.zeng@rock-chips.com>
KSV list/M0/B-STATUS are saved in hdcp1.4 external memory.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I4670260dc4b82563e9396d641fafb579ef130fca
We need use sip call to change ddr frequency.
Change-Id: I6ad4516306f0cb7c3e0a7124c21ee9fedfd9d055
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This reverts commit ba3959aef3.
After commit 58461615ac ("regulator: rk860x: fix the chip id error"),
rk8603/rk8604 support is moved to rk860x-regulator.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I1229b2f859ae7123f3b1897f999c13ba5e5cf7d8
If not assigned, the clock parent of DCLK_VOP2 will be
PLL_HPLL in uboot, which affects HDMI display.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ife948de756281ed197413301ce1b05ddb80fe3d9
Because of the size increase in librkaiq, librockit, librockchip_mpp
and face models, and cause the ramdisk size increase:
ramdisk_r + 1408KB
ramdisk_c + 547KB
The increase of ramdisk_c cause the startup speed increase: + 7ms
(test in SPI NOR flash).
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: I40bd2cbc93021c56359fd625f029747b36e2f414
without this commit, the cluster maybe display splash screen in some scenarios
at low logic voltage.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I8dc7c77df4431ee8d6695d626cd1f139b7d0a5c8
When physically contiguous virt_addr are import to the memory manager,
dma_map is not called. So that using the dma_sync_sg API to flush the
cache is ineffective, and dma_sync_single must be used.
Change-Id: Ib172cd4a4046e82f7f383dbc5cee23ae6af17156
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
There are no projects using MLC NAND FLASH with kernel
5.10 ARM64. This patch will disable rk_nand drivers to
reduce code size and optimize startup time.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I48108a7cc34d636aa1b4d552737d36f830f9a8ad
* Add task number tilling support
* Change kmalloc to vmalloc to avoid page allocation failure in RV1106
* Fix the issue of excessive time consumption in memory cache flushing
* Fix map pages into vma failed in kernel 6.10
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: I93c49a4766e4d3ff13a8d372be348757579c34e3
* commit '24ea6649adbb2c8e66b481cab90a2e9e9fcffa21': (64 commits)
arm64: dts: rockchip: rk3562-evb1-lp4x-v10: Change clkin div to 5 for aclk vo
arm64: dts: rockchip: rk3562-rk817-tablet-v10: Change clkin div to 5 for aclk vo
arm64: dts: rockchip: rk3562: Change clkin div to 4 for aclk vo
media: i2c: imx415 remove vendor limit of get dcphy param
arm64: dts: rockchip: rk3528-demo4-ddr4-v10-linux: enable sdmmc
ARM: dts: rockchip: rv1106g-evb2-v10-dual-camera: sc301iot modified compatible name uppercase to lowercase
media: i2c: sc301iot modified inferface name uppercase to lowercase
usb: dwc3: core: parkmode_disable_hs_quirk depends on CONFIG_NO_GKI
rpmsg: rockchip_test: add delay compensation
media: rockchip: isp: add iqtool video for isp21
arm64: dts: rockchip: rk3399pro-npu: dis u1 and u2 state for dwc3
arm64: dts: rockchip: rk1808: dis u1 and u2 state for dwc3
arm64: dts: rockchip: dis u1 and u2 state for rk3528 dwc3
ARM: dts: rockchip: update rk808 for rk3288-evb-rk808-linux.dts
ARM: dts: rockchip: Add mmc aliases for rk3288-linux.dtsi
drm/bridge: synopsys: dw-hdmi-qp: Fix frl switch error when switching resolution and color at the same time
ARM: configs: enable HDMI and MULTICODECS for rockchip_linux_defconfig
UPSTREAM: ASoC: rt5640: Remove the sysclk and sysclk_src checking
video: rockchip: mpp: fix some iommu hdl register issue
media: rockchip: isp: fix get tb info
...
Change-Id: Ibee7584caf950600b59a334dbc08f6959293ed95
The dclk vop is 132MHz, the aclk vop can be reduced appropriately.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I80d060fd90e013aaa1eea4d94868731e3cf02ffb
The dclk vop is 70MHz, the aclk vop can be reduced appropriately.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I05f79bb4bade6c8ff6c8014edce448f403bb9ca4
The aclk vop should be equal or greater than the half of dlck vop,
the highest frequency of dclk may be 148.5MHz, the aclk vop is 396MHz,
so change the clkin div to 4.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ibc47f31b7d03530929fd537020c60a39708ccdcb
