Commit Graph

1066342 Commits

Author SHA1 Message Date
Wang Panzhenzhuan
96201a0c4e media: i2c: add vcm driver dw9800w
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I1fa84ba018c376b79b952b6b0da9ab667d92fbb2
2022-06-02 20:19:42 +08:00
Lin Jianhua
e43dd4e3e3 ARM: dts: rockchip: rk312x: fixup the wrong voltage of opp-table
Fixes: 1bdf8f7722 ("ARM: dts: rockchip: rk312x: adjust opp-table for chips with low performance")
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I24e6223a82bc8a93f49132b2136f3d5534c04601
2022-06-02 20:07:37 +08:00
Joseph Chen
b4fa954b4c clk: rockchip: rk3588: fix 32-bit compile warning
"warn: should 'fout_hz << s' be a 64 bit type?"

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I3b842974c2c1709878702c35963df74acd7f4d2f
2022-06-02 16:01:25 +08:00
Finley Xiao
aa41f82fc5 arm64: dts: rockchip: rk3588s: Add rockchip,leakage-voltage-sel for dmc
Change voltage according to logic leakage.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ic9d3fcf7ab3bd2730ec2a7edb3430ffc22f7e92f
2022-06-02 10:44:44 +08:00
Finley Xiao
ce865184a6 arm64: dts: rockchip: rk3588s: Add mem supply for dmc
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I728dc5f0e64b4c9b9e43fed0b8a0fcc88fe7efaf
2022-06-02 10:28:27 +08:00
Finley Xiao
6a1d3bccc8 PM / devfreq: rockchip_dmc: Implement rockchip_dmcfreq_adjust_opp_table()
The dev_pm_opp_add() can't be used to add opp with multiple voltage
ranges, and there's no need to add new opp, just need adjust opp rate
according to the rate support by DDR.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ic9dd29bedd22d0b7928110c6d0c6483414b48415
2022-06-02 10:25:47 +08:00
Finley Xiao
d388ec1af3 PM / devfreq: rockchip_dmc: Add multiple regulators support
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I46f38c4b40031d09bd3881ff65fb11c64fa63d13
2022-06-02 09:49:21 +08:00
Damon Ding
8556761fe1 ARM: dts: rockchip: rv1106-evb: add mcu ext board support
A 320x480 RGB/MCU screen K350C4516T.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I69fb045703cc882e0536b5e44df0874c1b1b90ce
2022-06-01 17:03:50 +08:00
Yongzhen
7802c2a45e ARM: dts: rockchip: rv1106g-38x38: change include dtsi
Signed-off-by: Yongzhen <yuyz@rock-chips.com>
Change-Id: I8b04246302bc449addd87808b4c16f2c37e37c51
2022-06-01 17:02:15 +08:00
Sach Lin
c66fae821e media: rockchip: isp: use lager clk in 4 vir-isp mode
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: I6b2441a33a5c2f13879631090d1af62ec9d9b6cd
2022-06-01 16:59:55 +08:00
Zhang Yubing
42b3b26f75 arm64: dts: rockchip: rk3588-nvr: support dynamic switch dclk
It need enable the hdmi phy pll clock function node when the hdmi
phy pll want be used.

For support dynamic switch dclk with hdmi phy pll, the hdmi phy pll
need config in display subsystem node.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I740b6154b37c1e5d9491fafd33c0b6c0c9ffd149
2022-06-01 16:48:33 +08:00
Zhang Yubing
ca98cd18e8 arm64: dts: rockchip: rk3588: add hdmi phy child node for clock function
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I4319af5a7e642caa58b61211ca8900080380a713
2022-06-01 16:48:33 +08:00
Zhang Yubing
9be2da2d2f phy: rockchip-samsung-hdptx-hdmi: register clk in child device
In uboot, a device can't be used as both phy device and clock
device. So It better to register a child device as clock device.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I6d06f3c3b0f0b48741a5c53f51df1766b2cb0740
2022-06-01 16:48:33 +08:00
Zhang Yubing
9afbb1484f arm64: dts: rockchip: rk3588: remove hdmiphy pll config
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ib72a7a0384f564699926af4b60d978021e995eb8
2022-06-01 16:48:33 +08:00
Zhang Yubing
436e63d852 drm/rockchip: vop2: move expend clk in display sub-system node
Moving expend clk in display sub-system node, which make it
easier when add extend clk for vop.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I3175d54c8a44fc6b205fcd3623e3c5656b308fe8
2022-06-01 16:48:33 +08:00
Jianqun Xu
9d8e12c075 ARM: configs: rk3308_linux_aarch32_defconfig: CONFIG_STMMAC_ETH=y
Select stmmac ethernet for rockchip dw mac.
+CONFIG_STMMAC_ETH=y

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I21d83b96cf9e1759ea40aa2b180dff35bc936384
2022-06-01 16:40:41 +08:00
Jianqun Xu
7f2240e541 arm64: configs: rk3308_linux_defconfig: CONFIG_STMMAC_ETH=y
Select stmmac ethernet for rk3308 gmac.
+CONFIG_STMMAC_ETH=y

Change-Id: Ife31b97e1d4aa3aa749544c42dbc7fe8ab74274f
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2022-06-01 16:27:00 +08:00
Lian Xu
bd0cebb689 media: rockchip: isp: read the color_ctrl reg for isp32
Change-Id: I4c06d7944b0fb61bfd5f39560a7bd4afefa4f761
Signed-off-by: Lian Xu <xu.lian@rock-chips.com>
2022-06-01 14:36:37 +08:00
Jianqun Xu
cd6d4b33c5 arm64: configs: rockchip_linux_defconfig set IOMMU IOVA ALIGN to 64KiB
Set iommu iova align to lowest value 64KiB.

+CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y
+CONFIG_IOMMU_IOVA_ALIGNMENT=4

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I52bb3dea9ff49e2cc032d643442176d312a185b6
2022-06-01 14:33:37 +08:00
Finley Xiao
7b7086f75d clk: rockchip: rk3588: Remove CLK_IS_CRITICAL for CLK_650M_SRC
The CLK_650M_SRC is unused.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I54d473d27220b7620f1c25e21abadb1c9613e3f9
2022-06-01 14:31:53 +08:00
Finley Xiao
fc8a889a83 Revert "clk: rockchip: rk3588: Remove CLK_IGNORE_UNUSED for lpll, b0pll and b1pll"
This reverts commit 7b43769a16.

Change-Id: I3f24c6403e91f9a7e1e2bfe86f9035984298d0b5
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2022-06-01 14:31:53 +08:00
Chen Shunqing
8cd9b111b1 media: rockchip: hdmirx: fix get timing fail after set edid
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I8459fb4a57f83e4f301cdfb9215ba052a97c1f12
2022-06-01 11:20:33 +08:00
Tao Huang
ae520a187c ARM: rv1106-evb.config: Update by diffconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I15631c039350f58d64e14331f7b75fd8a3703ee4
2022-06-01 09:48:10 +08:00
Lin Jinhan
8d6900a1f5 ARM: configs: rv1106-smart-door: add camera module driver enable
CONFIG_RK803=y
CONFIG_VIDEO_GC2093=y
CONFIG_VIDEO_SC132GS=y

Startup time  : increased by 34ms.
Firmware size : increased by 6KByte.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I1697803d36d1cecaee46b0f91097c52b72cfa9cb
2022-06-01 09:47:03 +08:00
Lin Jinhan
9d79315abd ARM: dts: rockchip: rv1106-smd-cam: add rk803 & sc132gs node
RMSL132 module contains RK803 and SC132GS.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifc7d36c76c319645d5f7d8dce2c2ddff018bc306
2022-06-01 09:44:31 +08:00
Lin Jinhan
0cb5f462d0 misc: rk803: add power supplies control
The RK803 in the RMSL312 needs power control to work properly.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Icc8a60e1a87dd2c3b32bda8598dc65d73e28f917
2022-06-01 09:40:26 +08:00
Lin Jinhan
93e191ebba media: i2c: add SC132GS driver
add reset gpio control

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I3b39752bddb2035bbd61828c8c86427901c973db
2022-06-01 09:36:20 +08:00
Algea Cao
50f3fd6b3d drm/rockchip: dw_hdmi: Update RK3588 color selection policy
1.If mode can't support yuv420, change color to rgb.
2.If mode is 10 bit color deep mode, tmds clk is greater than
tv's max tmds clk and mode can't support yuv420, change color
deep to 8bit.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I947f68b75c5dedaf9e8b4db2c87bb2381186a63a
2022-06-01 09:24:50 +08:00
Algea Cao
e1cf1f3db7 drm/bridge: synopsys: dw-hdmi-qp: Fix 4K30 vic is zero
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I6d25db1643ae93ea11e1a3503d5632c1f8ae8906
2022-06-01 09:11:00 +08:00
XiaoDong Huang
517c153a8d dt-bindings: suspend: rk3588: add RKPM_PMUMCU_CEC_WKUP_EN RKPM_PMUMCU_VAD_WKUP_EN macro
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I3cd999f7a29b6b30514316593e73e4e16aa19a51
2022-05-31 17:52:29 +08:00
Wang Panzhenzhuan
d6c8e143e8 media: i2c: otp_eeprom: fix crash when otp info is null
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ia1a8e76349f61698db23ab994265945c73cc9714
2022-05-31 17:40:56 +08:00
William Wu
acf136a642 usb: dwc2: reinit for host mode during resume if lost power
If the dwc2 controller lost power in suspend, we need to
reinit the core when the dwc2 in host mode. There are two
methods to set the dwc2 in host mode, and we need to reinit
the dwc2 to host mode separately during resume.

1. Set the dr_mode to otg, and plug in OTG cable with
   the ID pin conneted to GND.

   In this case, we can reinit the core to device mode
   firstly, and later after do dwc2_hsotg_resume, it can
   trigger the ID status change interrupt if the OTG cable
   is still connected, then we can init for Host mode in
   the ID status change interrupt handler.

2. Set the dr_mode to host, and force the dwc2 to Host
   mode irrespective of ID input pin.

   In this case, we can't depend on the ID status change,
   so we do force host mode and init the core during resume.

With this patch, it can fix the kernel panic if the dr_mode
is set to host mode during resume.

[  134.975352] Unable to handle kernel write to read-only memory at virtual address 0000000000000068
...
[  134.981681] CPU: 0 PID: 1646 Comm: Binder:157_3 Not tainted 4.19.193 #37
[  134.982290] Hardware name: Rockchip rk3326 S1002 avb board (DT)
[  134.982836] pstate: 60400085 (nZCv daIf +PAN -UAO)
[  134.983286] pc : kill_all_requests+0x20/0xe8
[  134.983685] lr : dwc2_hsotg_core_init_disconnected+0x24/0x770
...
[  135.098090]
[  135.098248] Call trace:
[  135.098503]  kill_all_requests+0x20/0xe8
[  135.098876]  dwc2_hsotg_core_init_disconnected+0x24/0x770
[  135.099377]  dwc2_resume+0x108/0x110
[  135.099722]  dpm_run_callback+0x48/0x230
[  135.100099]  device_resume+0xb4/0x250
[  135.100448]  dpm_resume+0x104/0x398
[  135.100784]  dpm_resume_end+0x14/0x28
[  135.101142]  suspend_devices_and_enter+0x15c/0xa68
[  135.101586]  pm_suspend+0x458/0x6d8
[  135.101927]  state_store+0x84/0x108
[  135.102271]  kobj_attr_store+0x14/0x28
[  135.102637]  sysfs_kf_write+0x48/0x58
[  135.102988]  kernfs_fop_write+0xf4/0x220
[  135.103367]  __vfs_write+0x34/0x158
[  135.103708]  vfs_write+0xb0/0x1d0
[  135.104027]  ksys_write+0x64/0xe0
[  135.104346]  __arm64_sys_write+0x14/0x20
[  135.104726]  el0_svc_common.constprop.0+0x64/0x178
[  135.105172]  el0_svc_compat_handler+0x18/0x20
[  135.105580]  el0_svc_compat+0x8/0x34
[  135.105929] Code: a90153f3 aa0003f6 f9001bf7 2a0203f7 (f900343f)
[  135.106485] ---[ end trace ddc1f4a0765afacd ]---
[  135.253494] Kernel panic - not syncing: Fatal exception

Change-Id: Ibfcd1c9176d8b4abb2fc8b3b5c8b0b6a866db4e7
Signed-off-by: William Wu <william.wu@rock-chips.com>
2022-05-31 16:34:35 +08:00
Maxim Devaev
52ec93c3af UPSTREAM: usb: gadget: f_hid: optional SETUP/SET_REPORT mode
f_hid provides the OUT Endpoint as only way for receiving reports
from the host. SETUP/SET_REPORT method is not supported, and this causes
a number of compatibility problems with various host drivers, especially
in the case of keyboard emulation using f_hid.

  - Some hosts do not support the OUT Endpoint and ignore it,
    so it becomes impossible for the gadget to receive a report
    from the host. In the case of a keyboard, the gadget loses
    the ability to receive the status of the LEDs.

  - Some BIOSes/UEFIs can't work with HID devices with the OUT Endpoint
    at all. This may be due to their bugs or incomplete implementation
    of the HID standard.
    For example, absolutely all Apple UEFIs can't handle the OUT Endpoint
    if it goes after IN Endpoint in the descriptor and require the reverse
    order (OUT, IN) which is a violation of the standard.
    Other hosts either do not initialize gadgets with a descriptor
    containing the OUT Endpoint completely (like some HP and DELL BIOSes
    and embedded firmwares like on KVM switches), or initialize them,
    but will not poll the IN Endpoint.

This patch adds configfs option no_out_endpoint=1 to disable
the OUT Endpoint and allows f_hid to receive reports from the host
via SETUP/SET_REPORT.

Previously, there was such a feature in f_hid, but it was replaced
by the OUT Endpoint [1] in the commit 99c5150058 ("usb: gadget: hidg:
register OUT INT endpoint for SET_REPORT"). So this patch actually
returns the removed functionality while making it optional.
For backward compatibility reasons, the OUT Endpoint mode remains
the default behaviour.

  - The OUT Endpoint mode provides the report queue and reduces
    USB overhead (eliminating SETUP routine) on transmitting a report
    from the host.

  - If the SETUP/SET_REPORT mode is used, there is no report queue,
    so the userspace will only read last report. For classic HID devices
    like keyboards this is not a problem, since it's intended to transmit
    the status of the LEDs and only the last report is important.
    This mode provides better compatibility with strange and buggy
    host drivers.

Both modes passed USBCV tests. Checking with the USB protocol analyzer
also confirmed that everything is working as it should and the new mode
ensures operability in all of the described cases.

Link: https://www.spinics.net/lists/linux-usb/msg65494.html [1]
Change-Id: I5cd93f642e5696a84e58afc63aaaaf8e27c7d514
Reviewed-by: Maciej Żenczykowski <zenczykowski@gmail.com>
Acked-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Maxim Devaev <mdevaev@gmail.com>
Link: https://lore.kernel.org/r/20210821134004.363217-1-mdevaev@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit d7428bc26f)
2022-05-31 16:34:35 +08:00
Jianqun Xu
98712c141d arm64: dts: rockchip: rk3399-linux enable fiq mode
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I648680971d7b3841046c65bcfdffbcb808ede498
2022-05-31 16:24:12 +08:00
Wyon Bi
2185f7dbbe mfd: max96752f: Mark regcache as dirty at power-on-reset
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ifefad0dc1538188e07f33eb9621990f099f0036c
2022-05-31 16:22:40 +08:00
Finley Xiao
9fc3eb23a7 arm64: dts: rockchip: rk3568: increase register map size for nocp
Fixes: e866f07afb ("arm64: dts: rockchip: rk3568: Add nocp device node")
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I567e061d42b72aabc2a8148b1a5e89993c8de1ca
2022-05-31 15:53:25 +08:00
Tao Huang
7146449306 ARM: configs: Remove unused rk3308_linux_aarch32_debug_defconfig
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I98c40127ee5a897f63a9457736c3bf88220d69d8
2022-05-31 15:38:05 +08:00
Liang Chen
f3c5ed723d ARM: dts: rockchip: rv1106: use pvtpll for RKVENC/NPU
Change-Id: I29372d60facb9a48689b78774067404ff1e1fd93
Signed-off-by: Liang Chen <cl@rock-chips.com>
2022-05-31 14:36:58 +08:00
Liang Chen
ddacbfc334 ARM: dts: rockchip: rv1106: assign clock frequency for pvtpll
Change-Id: Ib48f003b4ce5a0cc55f60eb8aa121750588e5837
Signed-off-by: Liang Chen <cl@rock-chips.com>
2022-05-31 14:36:53 +08:00
Liang Chen
236ba7b878 clk: rockchip: rv1106: enable cru pvtpll0/1
Change-Id: I828d3764cab23581272828c325bc35d42ed27ed4
Signed-off-by: Liang Chen <cl@rock-chips.com>
2022-05-31 14:36:46 +08:00
Jianqun Xu
054f4604ae ARM: configs: rk3308_linux_aarch32_defconfig: CONFIG_EXTCON=y
Select extcon for headset jack report.
+CONFIG_EXTCON=y

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ie3568d2a9f9e31131cd1129a2d2f5154aaf45844
2022-05-31 14:31:47 +08:00
Jianqun Xu
f838c5cd3d ARM: configs: rk3308_linux_aarch_defconfig: CONFIG_ROCKCHIP_CPUINFO=y
Select cpuinfo for soc_is_rk3308().
+CONFIG_ROCKCHIP_CPUINFO=y

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If08b8ea38bff175dc7f44a7afa170ea9f520089d
2022-05-31 14:30:29 +08:00
Jianqun Xu
f3b1b38810 arm64: configs: rk3308_linux_defconfig: CONFIG_EXTCON=y
Select extcon for headset jack report.
+CONFIG_EXTCON=y

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ib9c1ad99a0cf864b88dc54ac2a83c045a2c354b2
2022-05-31 14:24:24 +08:00
Shaoxing Chen
34aecd9b60 ARM: configs: rv1106-smart-door: enable wireless
Signed-off-by: Shaoxing Chen <csx@rock-chips.com>
Change-Id: Ie1bf2961b299c87bb5ccd496435071b30edb57c5
2022-05-31 11:40:21 +08:00
Weiwen Chen
acb5b4e86e ARM: dts: rockchip: rv1103: limit highest frequency
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I89624e16b0bcabc106042313bfd14e263a454620
2022-05-31 11:06:49 +08:00
Andy Yan
de1b8efb44 drm/rockchip: use drm_format_info_min_pitch calculate pixel pitch
According to comment in drm_format_info, drm_format_info_min_pitch
has better compatibility than calculate by cpp.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I246f29bc6a5482242ff8d533c0416101a04c7550
2022-05-30 16:29:57 +08:00
Hu Kejun
001467a8bc media: i2c: dw9714: support advanced mode
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Iaf1350acd5df59b6eed00ae3c276f97a248b2c75
2022-05-30 16:28:04 +08:00
Hu Kejun
ec83376701 include: rk_vcm_head: add advance mode config
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I6cb4837fd0557e9c903b132b67913f67723a461c
2022-05-30 16:28:04 +08:00
Guochun Huang
a4522af56f drm/rockchip: dsi2: find possible connector from connector_list
DSI may not int a connector when attach a bridge, to support
uboot/kernel logo, drivers can find possible connector from
connector_list to register a rockchip_drm_sub_dev which specify
loader_protect helper.

Change-Id: I8a72192f252e17d4003da24d89326a55f0f3f578
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2022-05-30 16:23:13 +08:00
Damon Ding
f10608b5d1 drm/rockchip: vop: add support for color key on rk3399
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I0f46b27d41e33a540a6fda1b165f01407dc0d613
2022-05-30 15:52:08 +08:00