crypto and dmac share the same noc clk,
so mark the aclk_dmac_bus as critical clk.
Change-Id: Ib0b70bbed3fdefeab7b6f2b5f88350a416e66787
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
npll is just for dclk_vop, others clk not allowed to set npll as parent.
Change-Id: I11e1770acab5486acaebafd56a0c57847f7f533c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
with the NB parameter,can adjust the jitter of the output PLL.
make the npll jitter is better,make it more suitable for DCLK display.
Change-Id: I9d819bdc2b520205a7d63ee8ed83643601ccc821
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
to fix up :
[ 0.000000] clk: couldn't get clock 4 for /clock-controller@ff760000
[ 0.000000] rockchip_clk_of_add_provider: could not register clk provider
The cause of the error:
struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
const char *con_id, bool with_orphans)
{
/* This is to allow this function to be chained to others */
if (!hw || IS_ERR(hw))
return (struct clk *) hw;
if (hw->core->orphan && !with_orphans)
return ERR_PTR(-EPROBE_DEFER);
return clk_hw_create_clk(hw, dev_id, con_id);
}
if clk is orphan and not have the with_orphans flag, it will
register clk provider failed.
Change-Id: I87ca9ec087611a5425545bfc857b09d8438218b5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Rockchip RK3399 SoCs support reboot with modes, such as recovery mode,
loader mode and normal mode.
Change-Id: I96ed872f849c2b3b06d236248995db18be070960
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This option make the kernel boot faster.
Default n.
Change-Id: I918523621044e16953d5611ef9b0f2773746dae9
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Migrate to use new properties.
Fixes: af02b05e59 ("mmc: add thunder boot support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I26e1c5b65a994522fdfd5cbc54ed17909bbaa95f
RK808\RK818 have November 31st,Other chips fixed the problem.
Fixes: f076ef44a4 ("rtc: rk808: Compensate for Rockchip calendar
deviation on November 31st")
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I8977a14abcc3973728b5941951d17d493b3955d4
modify the rk808 max steps for increase voltage of Buck1/2,
equal 25mv.
Change-Id: Ic6c016e99ce67f5773d5f5df0b65fa1de10f557a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
fix up the RK816 setting voltage drop make the system crash.
Before adjusting voltage, increase clk_cpu div and reduce CPU frequency
Only support for RK312x chips.
Change-Id: Id327da9590f7d9d383450e79acd1b309e05cd024
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
This submit supports to compile vendor storage into a module.
Change-Id: Id88bbee6ff44a75b2aa163a669098d410afaa921
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
The sequence of operations is as follows:
1. disable the sleep pin function
2. modify the sleep pin polarity
3. delay 3 32k clock cycle
4. select the sleep pin function
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: If6df2b2f190951abe9bb31fbd18d9af47e145038
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
set 3.4v interrupt signal assert when suspend, set 3.0v shutdown
signal assert when resume.
Change-Id: Id15b721bbdc9665a18cf9946b92c435a23f1666c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
RK816 has 1 pin to be used as GPIO or TS function.
When used as GPIO function, the pin can be output or input.
Change-Id: I8607595826ac3125dfa2a4c7c483be6b084204c2
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This setting will be added by ddr binary when necessary to
handle the high temperature-voltage issue on BUCK3.
Change-Id: Ief7d4954e459317ae571400496c4c5ef74f664af
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Show the reason of this power on and last shutdown.
Change-Id: Id540433065859a0c3f4817ed66e295b7c6dfccb5
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The registers relative with fuel gauge must be volatile.
Change-Id: I8e942e8f15f66dabf24ede48b81857947575fa23
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
If the system needs hold register values when system will reboot.
need to set only resetting pmic register for 817&809 forcedly.
When system restart, there are two rst actions of PMIC sleep if
board hardware support:
- 0b'00: reset the PMIC itself completely.
- 0b'01: reset the 'RST' related register only.
In the case of 0b'00, PMIC reset itself which triggers SoC NPOR-reset
at the same time, so the command: reboot load/bootload/recovery, etc
is not effect any more.
We add a cmd list to check if this reboot cmd is what we expect for 0b'01.
Change-Id: Ib4b850c86ec3079cd7e374bc96460ee1532854a2
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
remove the rk8xx-pwrkey.c file, it's function is same as rk805-pwerkey.c.
Change-Id: Ie8a0559c3a105ec9806f170d0c4d32c2691558c6
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This format is a definition from rockchip rk61x/rk62x
lvds, and has no application scenarios so far.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ifb139eaf35d5e83fa96579b1dfcf3762556a77a1
Fix the follow compile error:
In file included from drivers/gpu/drm/rockchip/rockchip_vop2_reg.c:10:
drivers/gpu/drm/rockchip/rockchip_drm_vop.h:196:22: error: field has
incomplete type 'enum drm_plane_type'
enum drm_plane_type type;
^
drivers/gpu/drm/rockchip/rockchip_drm_vop.h:196:7: note: forward
declaration of 'enum drm_plane_type'
enum drm_plane_type type;
This is due to the remove of drmP.h:
commit 4e98f871bc ("drm: delete drmP.h + drm_os_linux.h")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic7d1d58d5d4c9c032067c7686c76cef41a92a5d2
Remove gpiochip related codes from pinctrl driver, but populate gpio
platform devices from device tree data.
Change-Id: I347acaac2998a972e4c3be5c8827f77f468a7ad2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This gpio driver codes mostly are copied from pinctrl-rockchip.c with
module fixes. Also it supports the old dt nodes.
Change-Id: I7f26b5fe0827c16e2146a40e035a81de74284191
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Add a Kconfig flag to differentiate between a GKI and an Non GKI build.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib0c57f7579f2cec06288ac9e063548c6395bf44c
arch cris & metag have been removed from supported archs.
The dts hard link files should also be removed, or the ctags
tool will give warning.
execute"ctags -R" or "gtags", output:
ctags: Warning: cannot open source file
"scripts/dtc/include-prefixes/cris" : No such file or directory
ctags: Warning: cannot open source file
"scripts/dtc/include-prefixes/metag" : No such file or directory
This patch was override by commit 9820464afd ("UPSTREAM:
devicetree: Move include prefixes from arch to separate
directory"), so apply it again.
Change-Id: I002617cde3f879bc8364f55502839b3c3cd2dd92
Signed-off-by: Liu Changcheng <changcheng.liu@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
(cherry picked from commit 8d14f31ec9)
