Before this patch, the rknpu mem uses the partial sync ops from dmabuf,
which is not upstream patch. this patch makes the sync ioctl to use dma
apis directly.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Id648f567af86a36459d10e96db2aec2cd4177fce
Delete unused definition and modify the error register definition.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I255c17049bc28faf108dbca8ec0337d3ccb11555
The dsm sound may be channel disorder when play sometimes,
we can reset the rk_dsm to reconfigure the IP and make it
work well.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Iece70267c478c0ec60f685ab85e39ff365b16f4c
Physically contiguous virt_addr needs to add the offset of the first
page when obtaining the phys_addr.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I8076ad2aac31ad61d8a5e0d4332fe69f702d2adb
When the horizontal input exceeds 2k (here refers to 1996), need to switch
from BI-cubic to BI-linear. When there is an HSD(horizontal scale down),
need to check the horizontal input after the HSD.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I3e4ceeb0e85811ccb131c22fe77ebaa571b8a922
Modify recognition that acquire_fence has been signaled
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Id7d9ba288dae05b8c50ebb2090e3aa7ae8b61671
-40 to 125°C reliable, outside the range existed unreliability.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I7f24809bd7a4aa89a7fa12763081258468281fee
This patch set HS disconnect detect mode to single ended detect mode
for RV1106, fix RV1106 can not recognize device plug out sometimes.
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Change-Id: I6ee6ded4cc12032cf2825eadd207c1e5003957cd
Fixes: 5d33c809c3 ("ASoC: codecs: Add support for rockchip codec digital interface")
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I867538d4aef82120b9cefa2cf833ccfe43f11596
Workaround for FIFO clear on SLAVE mode:
A Suggest to do reset hclk domain and then do mclk
domain, especially for SLAVE mode without CLK in.
at last, recovery regmap config.
B Suggest to switch to MASTER, and then do FIFO clr,
at last, bring back to SLAVE.
Now we choose plan B here.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I1884659df7fa9052477652b7b0315da21e3165c2
The previous idea about FIFO clear on SLAVE mode is:
1, Switch to MASTER mode
2, Do FIFO clear
3, Switch to SLAVE mode
But, there is a risk that drivers don't set mclk on SLAVE mode,
the mclk from PLL maybe a very high freq (higher than controllers'
signoff freq) that make controller work unexpected.
This patch allow set mclk freq for MASTER / SLAVE mode to fix it.
and, of course, there is no side effect.
This patch also simplify the clear routine by merging clear step 1/2
into a single one.
Fixes: 0a0a0b7606 ("ASoC: rockchip: i2s-tdm: Fix FIFO clear error on SLAVE mode")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I8488b039e1e21a632bfd2a1c48c86b343fded17a
The emmc power is turned off after it is suspended. The drivers
need to enable the power off notification, otherwise the emmc
initialization will take a long time during wake-up.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iea233d378c0a7f313ebc39228b4e109cbb4a4f83
The emmc power is turned off after it is suspended. The drivers
need to enable the power off notification, otherwise the emmc
initialization will take a long time during wake-up.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I52ed6ecd3c5bb8eacf2b918a7b091e83db026594
The emmc power is turned off after it is suspended. The drivers
need to enable the power off notification, otherwise the emmc
initialization will take a long time during wake-up.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ifbcfdc0b7821c85cc20d7a88c86c29b5343d7259
The emmc power is turned off after it is suspended. The drivers
need to enable the power off notification, otherwise the emmc
initialization will take a long time during wake-up.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I47d61aa0b3d310c3c5718e35dc4432111103ec19
As the clk_matrix_200m_src is critical clock.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I1efb315dd00de2aa4f4067a84f04f9370c91d915
