pm_runtime_force_suspend/pm_runtime_force_resume will not work
if the device is in suspend when pm_runtime is disabled.
Change-Id: I7179ecab2b059b43fab6d84683e52ae5c21096ae
Signed-off-by: Liang Chen <cl@rock-chips.com>
Using BBT in flash to avoid frequently flash operation for bbt info.
And it's secure to record the bad block info in bbt instead of
programing to the bad block with extremely unstable performance directly.
Change-Id: Icfe816c2c17ff3b747ce0a2512b1d9d6d0129fa0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.cherry-pick from kernel-4.19
2.fix compile errors and adapt to kernel-5.10
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I5dc11d3c8a2559303d96b3206fafadb46f95ed0f
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
DPTX implements the programmable SSC down-spreading with up to
0.5% modulation amplitude and 30k/33k modulation frequency.
Change-Id: I2c3eae8f27c84eb1b22eac8973691e0276c1588e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
No need to use CONFIG_MALI_BIFROST_FOR_LINUX
after px30/rk3326 Android and Linux device
use the same bifrost_device_driver "drivers/gpu/arm/bifrost".
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: Ia4c9c79be2c10d5d708a8ea1bb4bc5d49c97267b
Because they are no longer useful,
after rk3288/rk3399 Android and Linux device
use the same midgard_device_driver "drivers/gpu/arm/midgard".
Change-Id: I7ccc3c99fdfdde5a0ea12a7f3e1931fd5f1ce4cb
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
RK3568 USB DWC3 controllers require to disable receiver detection
in P3 for correct detection of USB devices. And this quirk to set
the GUSB3PIPECTL.DISRXDETINP3, then the DWC3 core will change the
PHY power state to P2 and then perform receiver detection. After
receiver detection, the DWC3 core will change the PHY power state
to P3 state.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iaad3f7ce2c4dee1788539781e3bcfbb39458f5d6
According to the programming guide, it needs to reset the
device with DCTL.CSftRst when switching from host to device.
The current code use dwc3_core_soft_reset() to do DCTL.CSftRst,
it will also duplicate phy init which has been done in runtime
resume routine, this cause the phy init/exit operations are
unbalanced.
Without this patch, the dwc3 gadget resume fail on RK3568 EVB1
with the following log:
dwc3 fcc00000.dwc3: failed to enable ep0out
It's because that the init_count of usb3 phy is not 0 when
resume, so the dwc3 fail to call usb3 phy init, and the 3.0
pipe clock is not be running.
Fixes: b48bcb27ae ("FROMGIT: usb: dwc3: core: Do core softreset when switch mode")
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I58ec26f9f007c94f8979eeeb9a9d683c6db9548f
Some linux app(cusor) may set negative coordinates(crtc_x/y)
And some linux app(mpv) may set coordinates outside the screen.
These are both unsupported on rockchip vop.
so we use clipped coordinates here.
Change-Id: I63288cf9120cea75e784d49bc88b591f243e7d8d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This reverts commit 75cc68bce9.
From the latest code tests, this commit is not required.
Change-Id: Iad8e43fe119dee15de5e9b517df25a41fa71742c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
drm_format_info can't offer yuv afbc bpp info, so we add this
interface to replenish it.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ib4d5f804b2ccdc20909420acd4911aa159d5a6fc
clk init on time_init() which is before pure_initcall.
So call rockchip_soc_id_init() before call soc_is_rk3308b().
Change-Id: Iece3673bc7309ef9193df99f2a95e4b930613a3e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Allow rockchip_soc_id_init() called before pure_initcall.
Change-Id: Ie0d3a18e96df02c2d6ab4aa3e17ea102685cd0c4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
1.max_dll_cells is 0x1FF when sfc_ver_4
2.sfc_set_delay_lines to zero means disable dll
3.bypass dll training when there is no device
4.Adjust the dll_value to from the middle of the dll window to
the better one
5.Change RKSFC_DLL_THRESHOLD_RATE to ">50MHz"
Change-Id: Ibd669420899925272c74e190fee8c62c09db8d14
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
When the related print appears, it means that the SDK is too old
and the storage driver needs to be updated.
Change-Id: I63f45fba4cf52108c628f225ee23aa0819ca256f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The rk3588 supports 5 controllers:
- 1 pcie3x4;
- 1 pcie3x2;
- 3 pcie2x1(2 of them also available in rk3588s);
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: Icae3a5539ace233141ff7f89600d17758be7fa5c
RK3588s supports 2 pcie2 controllers which use the phy combo to sata and
usb3.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: Id97957ef5341e9ab61af861b2b6194c056ad5835
Attach iommu when hw running will be crash.
Therefore, just attach iommu once.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I46002e01542466e9084c51a49e3da6c3f2db2298
CONFIG_MEDIA_SUBDRV_AUTOSELECT is default n.
CONFIG_MEDIA_CONTROLLER and CONFIG_VIDEO_V4L2_SUBDEV_API is selected by
CONFIG_VIDEO_DW9714.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I98b93dc1cc204089db2e31665210710437a1df19
Avoid the high 32btis input param of GENMASK bigger then BITS_PER_LONG.
For example offs 62, bits_per_block 3, and BITS_PER_LONG 64, then:
GENMASK(offs + bits_per_block - 1, offs) -> GENMASK(64, 62) -> 0.
But actually we want to mask GENMASK(63, 62) which is equals to
0xc000000000000000.
Change-Id: Ie3ee89a4b3e3deca45ccf429bfdfc5b88e3e6b9c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
