This patch set bcdUSB to 0x0200 for non-SuperSpeed gadget
which disable LPM. It can avoid usb bus enter LPM.
Test on RK356X platform, connect USB2.0 ADB to the PC USB
host port, without this patch, the usb bus will enter LPM
dynamically and trigger the USB DWC3 controller suspend
interrupt event frequently (more than 1000 interrupts per
second).
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Id0b9d54800e471512a417933868f76181c89e99d
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Change-Id: Ibb9564318ea9b14575cc5cb8695495088a4f0c4d
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Change-Id: I14dd9596445d5cac0297fcf6306a82b40b31cdaa
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: I219f440c922847f0b0affaaaa268161213fa5f78
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I2b20b6345149cc96f6d12ccc9d6b41b85d6b9c10
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie8a3855677606720214e41d99b90b9ff490e1db2
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I6dd48ba725673ec0ad33e8f59435a8b90913e149
The mode contains two copies of timings, first are the plain and
origin timings, this should keep unchanged, the second are copy
from the first timing by add some computed and special fixup, this
is associate with hardware.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ib841af1bbdc970d205d8aec3f83c6238a13bdede
This error resulted in the failure to reinitialize dcphy rx when resetting dcphy tx
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I3362505437102fb09585f74ce2cfa362c9a2fe76
There is a path in rt5645_jack_detect_work(), where rt5645->jd_mutex
is left locked forever. That may lead to deadlock
when rt5645_jack_detect_work() is called for the second time.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Change-Id: I89bc002a8d02614917dd056e0f7ec189f72cd6ad
Fixes: cdba4301adda ("ASoC: rt5650: add mutex to avoid the jack detection failure")
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Link: https://lore.kernel.org/r/1707645514-21196-1-git-send-email-khoroshilov@ispras.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 6ef5d5b92f7117b324efaac72b3db27ae8bb3082)
On rockchip platforms, if the dr_mode supports otg, it will
allow dwc3 pm runtime and put the dwc3 in runtime suspend
synchronously at the end of dwc3 probe. It works well in most
scenarios with USB-C or USB-A interface.
However, for USB Micro interface with ID pin, if ID pin is
pull to low by OTG to Host cable during probe, the drd_work
which called from the dwc3_core_init_mode() maybe scheduled
before pm_runtime_put_sync_suspend. In this case, the dwc->
current_dr_role is DWC3_GCTL_PRTCAP_HOST when enter runtime
suspend.
Later in xhci_plat_probe, it try to do pm runtime resume, but
it fail to do dwc3_core_init_for_resume() in the dwc3_resume_common()
because the condition "!PMSG_IS_AUTO(msg)" is not true for the
current_dr_role DWC3_GCTL_PRTCAP_HOST, so it can't initialize
the dwc3 core.
This patch do dwc3_set_mode after pm_runtime_put_sync_suspend
if EXTCON_USB_HOST state is true, it can avoid host enter runtime
suspend during probe.
With this patch, it can fix otg host mode fail to detect device
using a Micro OTG cable at system boot time.
Change-Id: I8b71f8c2490988b51a89bad5c880fe3cdeba2bfa
Signed-off-by: William Wu <william.wu@rock-chips.com>
For Type-C to DP 4xlanes adapter, it is detected as
DP 2xlanes + USB3.0 DFP at the first time, and after
VDM negotiation completed, it can be detected as DP
4xlanes, in this case, the USBDP PHY needs to do mode
change in the udphy_power_on. During the mode change
process, the USBDP PHY will disable the PHY clocks
and assert the PHY reset, this also turn off the PIPE
clock which used for the source clock of the USB
controller. In order to safely disable the USBDP PHY,
it needs to select the UTMI clock instead of the PIPE
clock for the USB controller.
Fixes: 0b1d72b40c ("phy: rockchip: usbdp: Avoid access usb grf during dp phy power on")
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I5e055aa466af936a9a7fd1a59bbbe4ac8350a696
This is the 6.1.75 stable release
* tag 'v6.1.75': (2623 commits)
Linux 6.1.75
Revert "Revert "md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d""
arm64: dts: armada-3720-turris-mox: set irq type for RTC
Revert "KEYS: encrypted: Add check for strsep"
riscv: Fix wrong usage of lm_alias() when splitting a huge linear mapping
block: Remove special-casing of compound pages
i2c: s3c24xx: fix transferring more than one message in polling mode
i2c: s3c24xx: fix read transfers in polling mode
ipv6: mcast: fix data-race in ipv6_mc_down / mld_ifc_work
selftests: mlxsw: qos_pfc: Adjust the test to support 8 lanes
mlxsw: spectrum_acl_erp: Fix error flow of pool allocation failure
loop: fix the the direct I/O support check when used on top of block devices
ethtool: netlink: Add missing ethnl_ops_begin/complete
kdb: Fix a potential buffer overflow in kdb_local()
ipvs: avoid stat macros calls from preemptible context
netfilter: nf_tables: reject NFT_SET_CONCAT with not field length description
netfilter: nf_tables: skip dead set elements in netlink dump
netfilter: nf_tables: do not allow mismatch field size and set key length
netfilter: bridge: replace physindev with physinif in nf_bridge_info
netfilter: propagate net to nf_bridge_get_physindev
...
Conflicts:
drivers/clk/rockchip/clk-rk3568.c
drivers/devfreq/event/rockchip-dfi.c
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
drivers/i2c/busses/i2c-rk3x.c
drivers/i2c/i2c-core-base.c
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
drivers/nvme/host/nvme.h
Change-Id: I9649ece83925659bca59cced0be24f0bd165822a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
If the hid transfer with size divisible to EP0 max packet
size, it needs to set the req->zero to true, then the usb
controller can transfer a zero length packet at the end
according to the USB 2.0 spec.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iae8c06966efe49c3a33213f9c36dd752633e8bd1
If the hid transfer with size divisible to EPs max packet
size, it needs to set the req->zero to true, then the usb
controller can transfer a zero length packet at the end
according to the USB 2.0 spec.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ia63060b4551d30821beaf494c1ccd7dfb3b6ca22
When a mst capable immediate downstream device connected,
some workqueue is used to help build and menage the
topology, write/read sidband message. To avoid some access
aux issue happen. we config phy power on when mst capable
immediate downstream device connected and config phy power
off when it becom disconnected.
When a mst capable immediate downstream device connected
and enter to suspend state, it need config phy power off.
And it need config phy power on when it enter to resume
state. This operation to guarantee phy can really power
off when suspend and really power on when resume.
Change-Id: I50e9c800c7b07ea2dd00d8728e08e9abc687378f
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
1. use rockchip,split-mode instead of split-mode;
2. rockchip,split-mode is split two same display interface and
register one connector;
3. rockchip,dual-connector-split is split two different display interface and
register two connectors;
4. use rockchip,left-display to identify the left display.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If428796d5bd36f6504b10faa31f8c74d73ff6036
1. use rockchip,split-mode instead of split-mode;
2. use rockchip,dual-channel instead of dual-channel;
3. rockchip,split-mode is split two same display interface and
register one connector;
4. rockchip,dual-connector-split is split two different display interface and
register two connectors;
5. rockchip,dual-channel use two same display interface to driver
one two channel panel and register one connector.
6. use rockchip,left-display to identify the left display.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ieb4519d1185a978a35fbdbeafc6fe1ac68e2328b
1. use rockchip,split-mode instead of split-mode;
2. rockchip,split-mode is split two same display interface and register
one connector;
3. rockchip,dual-connector-split is split two different display interface and
register two connectors;
4. use rockchip,left-display to identify the left display.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I425f80951fd5c99b31aa250383384500bae5f5f5
Find the physical ID based on the logical ID of the CPU. Currently,
there are three possible order of physical CPU IDs:
1.Typical RK3588 platform: 0 1 2 3 4 5 6 7.
2.RK3588 NVR SDK swap cpu: 4 5 6 7 0 1 2 3.
3.RK3583: 0 1 2 3 4 5 or 0 1 2 3 6 7.
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I174c06afb143f05e07b4d277a487383c3119938f
The original version would hold the DRM lock and immediately do a
drm_atomic_commit(), which may result in significant loss of
performance.
This patch postpones the commit timing. When the DRM commit has
taken effect, no additional commits will be made.
Change-Id: I04843e5ff490152fb53a967ed3fbd2e010d84ed6
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
The pixel shift feature allows to specify an X and Y direction offset
and apply offset to all planes.
Specify the vp to enable the feature in the dts:
&vp1 {
rockchip,pixel-shift-enable;
};
Offset values can be specified in user space:
echo shift_x shift_y > /sys/class/drm/card0/video_portX/pixel_shift
The "X" in "video_portX" corresponds to the video port id.
Change-Id: I96d3bc5bc21114621606cb38243dfc015c5f8ba3
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
This patch creates device nodes for each available crtc:
/sys/class/drm/card0/crtc_name
Change-Id: I748f56d90c3781b6e3100dfd08b4070ee7212575
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
