Restore link if controller or device is powered down in runtime PM
or system PM.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iec19935386fa532e537932ac5897de438371016e
Increase vepu's default frequency to 702M to meet the encoding
performance requirements for single-core 4k30.
Change-Id: I306f9d16e36b692b61c3aeae3d1c297923fd5e48
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
1. Add reboot frequency for opp table.
2. Add intermediate threshold frequency for opp table.
3. Add suspend opp for cpu opp table.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8863074713431f566336a70199f9b9e79ca1e7e3
Tips:
Set task_capacity > 1 in rk3576.dtsi, and then run link mode.
Change-Id: I1726226c3a67becd605ceca2eedcbb049dcea891
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
In vepu_510 the sli_done interrupt is triggered by slice_fifo not empty
status.Therefore when the sli_done_sta interrupt is cleared without
reading all the slice_len data in slice_fifo an extra interrupt will
be triggered. So it is better to clear the interrupt after reading all
slice_len to avoid false irq reporting. On the other hand, vepu_580 is
triggered only after writing a slice, without checking iif fifo is
non-empty, so there is no need to clear the interrupt again after reading the slice
Change-Id: If20a097b0e9fb41df9984c0ed316d717ba783ac4
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
If scaling is done vertically using bilinear interpolation, the input
resolution is forced to switch to average interpolation when it is
greater than 4096.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I66d2ecb76386d3f6378a241f7157af89f1e1542d
The initial speculation error may be related to inputs larger than 4K
and scaled down by more than 8 times. The current confirmation is that
the error is introduced due to division loss. To avoid this issue, it is
recommended to add rounding to the calculations.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ib2c4cd2e2fa9f002f65116c7491df60bb43c5e87
Implementing dp mst mode in uboot need much time and is difficult,
So The dp show uboot logo stll in sst mode though the branch or
sink support MST when attach to RK3576 DP Port. If some methods
foud that easy to show logo in MST mode, MST mode will be support
when show logo.
In order to show kernel logo only in SST mode. The DP controller
driver should force the DPTX controller work in SST mode whether the
sink is mst-capable or not until finish show logo.
Change-Id: I8feef5b3feb6f98d249b470cbe4b3363ba218733
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
`hdr_extend->hdr_type` add vivid hdr platform flag in bit[15:8]
to differentiate between different platforms in the future.
At present, only support rk3528/rk3576 vivid hdr, there is no
need to deliberately distinguish.
Change-Id: Id6e5dbc648358254e84397edc86a5e0c8cf97d8e
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
If rk3576 acm update parameters, there is no need
to disable acm in the first frame.
Change-Id: Ibcb43fc6ddecb250c3454c66fea2646a16969586
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
1.Support sharp work in rgb bus-format:
Sharp must work in yuv overlay. If bus-format
is rgb, post csc must perform r2y conversion.
2.Keep sw_sharp_enable always on:
sw_sharp_enable is sharp's master switch. When
enable/disable sw_sharp_enable will be a brief
black screen in some TVs.
Therefore, it is necessary to keep sw_sharp_enable
always on and enable/disable sharp function by
switching sharp submodule.
Change-Id: Ia1d21b02d30f82e59ab3d82b8b914ee439cba52a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Choose post csc mode directly by the color format and
color range of csc input/output.
Change-Id: Ib809e5898fd8a0178758e50ae9b8dfc4b8b63335
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Disable vdd_gpu when gpu is suspended to save power.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I3c983fd9ab153e37bbde6adf609a368b1c0b6b4b
Before the patch, the possible_crtcs in struct vop2_win_data
is used to register planes for DRM. But the index in struct
drm_crtc may be different from the id in struct vop2_video_port,
it may cause the warning:
[ 3.105377][ T10] Bogus primary plane possible_crtcs: [PLANE:56:Esmart1-win0] must be compatible with [CRTC:72:video_port1]
[ 3.105395][ T10] WARNING: CPU: 6 PID: 10 at drivers/gpu/drm/drm_mode_config.c:669 drm_mode_config_validate+0x380/0x4f0
To fix it, replace the possible_crtcs with possible_vp_mask
in struct vop2_win_data, which indicates the limitation by
vp id exactly, and add the vop2_win_get_possible_crtcs() to
calculate exact possible_crtcs for registration process.
Change-Id: Iaa866e90c894b9422f55872d0c5e7056f44dd489
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
For pwm v4, the disable operation, which sets polarity
to inactive state, will not take effect until the end
of current period.
Change-Id: Ie632b69d06495d96b79b9c743e69175cd5c175ed
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
For RK3588, if DP attached vp dclk parent is from v0pll, current vp dclk no need to use
hdmi phy pll; For RK3576, if DP attached vp dclk parent is from vpll, current
vp dclk no need to use hdmi phy pll;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If32d12df0df028cda48c7d0a5fd4e5513ec11265
This reverts commit d8e2297958.
Remove Android only config.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I6b535afac162b21e898954c4749c8103eb5a6945
This reverts commit d2573a1eaa.
Remove Android only config.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ib0a42db69125af41423bab2f2bc5ae474ff66c5b
