PD#167526: hdmitx: modify some modes parameters in ENCP
480p60hz,576p50hz,720p50/60hz,1080i50/60hz
Change-Id: Ia7b05ccbc20a200eb3684c7f4787e1c31a42cfc3
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#166221: emmc: optimize ds and core clock alignment
[problem] If the DS and core clock are aligned
at the beginning of the period, the program will
return directly without setting up CMD delay.
Change-Id: I65f32530884a2bea5171cc92e297a60f375a70f7
Signed-off-by: Long Yu <long.yu@amlogic.com>
PD#164611: usb: dwc3: add shutdown function for dwc3 driver
In suspend mode, we will shutdown the USB controller for reducing
more power consumption.
Change-Id: Icfc3182fce4f5455397e5f11fd08693f763757b3
Signed-off-by: Jianxin Qin <jianxin.qin@amlogic.com>
PD#168252: lcd: mipi-dsi: set clk lane only according to clk_always_hs,
remove restrictions by operation mode.
Change-Id: Icac07d74ae07d60edc6a6b507d06d962780e3984
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
PD#168365: usb: adjusted the sof interval to 125us through controller.
Change-Id: I9984e4dc5aa82808824949169ac8fadb4d0e7147
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
PD#167706: lcd: add screen black support before backlight on
Change-Id: I5fd1eb644ae96dac279a00740d8488d4c14870cf
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
PD#167435: default disable avsp long cabac
gxl must config this option enable, other
platform disabled to reduce mem consume
Change-Id: If522dd11dd017d3c04d859a62acacc4355ec2382
Signed-off-by: shihong.zheng <shihong.zheng@amlogic.com>
PD#167816:
When HDMI ARC connected,and the ARC sink support
ATMOS decoder,we need copy the edid bit in HDMIRX edid.
we need interface to set that bit to hdmirx.
Change-Id: Ic19bc17f166f8f10ba15e1e8b0de1f256296f9a5
Signed-off-by: Jian Xu <jian.xu@amlogic.com>
PD#164611: hdmitx: optimize hpll suspend
The BIT definition of RESET / ENABLE in G12A is different from
earlier chips.
HPLL suspend workflow:
1. set RESET as 1
2. delay 50us
3. set ENABLE as 0
Resume workflow is inverse, but no need anymore, it will be set
in set_disp_mode_auto().
Change-Id: I6e178466f865a643b4ef8d32dc59c99d1c96b94d
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
PD#165744: netflix: merge patch for fix 29.97 and 23.97 output evenly
NEEDLEPLAT-2057:
[Netflix][NTS] Video judders are observed during VP9/HEVC playback [1/1]
[Problem]
[Netflix][NTS] Video judders are observed during VP9/HEVC playback.
The problem happens at 'Boardwalk Twirl Ride' scene with seek point at 760
seconds. Seek before the point or the exact point will show stuttery video
display but a seek after the location or a short seek (swim operation in
NF's term) will make the playback smooth again. [Solution] The problem
is identified to be an uneven PTS timestamp for sample frames. In order
to get 29.97fps the timestamp of video samples are switching between a
30fps rate and some samples with longer duration so by average it's
29.97fps. The output rendering control has very strict timestamp comparison
between system time and the timestamp of video frame. When system time passed
the next video frame's timestamp, a new frame is toggled to display. For the
uneven PTS case, some frames have over 2 vsync duration and the others have
less than 2 vsync duration. Depending on the initial vsync offset, there is a
chance to have frames toggled in 13221322 vsync sequence, instead of a normal
always 2 vsync toggle one frame pattern. The change is to do a small adjustment
to the system time, based on initial system time and video timestamp so the "phase"
of the vsync can be set up to avoid such situation.
[Platform]
needle,stark
[Test]
Verify with Netflix Chime S1E8 29.97fps titles, 'Boardwalk Twirl Ride' scene.
Change-Id: I073481ce9e39f49555480a139e3b32d8cc047e1c
Signed-off-by: Tim Yao <tim.yao@amlog
NEEDLEPLAT-2604: [Netflix] Video judders during playback [1/1]
[JIRA] NEEDLEPLAT-2604
[Problem]
FRC caused video judders with 23.97fps source.
[Solution]
When source is 23.97 fps and output is 59.94hz, in order to make it
friendly to TV 3:2 pulldown detection, the video frame output should follow a
323232 patten, which means for each vsync, frames are repeated 3 times, then
switch to a new frame and repeat twice. Such repeating pattern will make the
average vsync toggle rate become 2.5 frame per vsync, to match 23.97 to 59.94
frame conversion rate. And TV side can also detect such patterns and do its best
recovery for MEMC processing. The problem with Netflix is the PTS of each vidoe
frame is not incremented in a constant duration, but with some frames bigger then
1/23.97 seconds and some are smaller. In Jira NEEDLEPLAT-2057 we have a similar
processing for the case when source is 29.97fps and output is 59.94hz and for this
Jira the reason is same. The fix for NEEDLEPLAT-2057 actually caused a side effect
because it tried to set the initial vsync phase to 0.5, to maximumly avoid the
problem, but for the 2:3 situation, a 0.5 phase make it worse because the average
FRC ratio is 2.5, so an initial 0.5 phase will always make the output pattern not
aligned at 232323 pattern when the duration of each frame is not even. This fix
is to move the initial phase to 75% so both cases should work fine.
[Test] Play typical HD source with 23.97fps and observe the playback smoothness.
Also double check Chimera Boardwalk Twirl Ride from seeking point 02:34:14 and
check the playback is smooth also.
Change-Id: I95c35d4ffa563f74b9afa7ae08f7ef22d1227706
Signed-off-by: Tim Yao <tim.yao@amlogic.com>
NEEDLEPLAT-3173: [NTS]Frame stuttering on 4K 60fps [1/1]
[JIRA] NEEDLEPLAT-3173
[Problem] The test clip is 4K 60fps and the output is 4K
59.94hz so a frame dropping always happen every 1000 frame. The clip is special
in that the duration (PTS growing distance) between each frame is not same. The
frame's PTS is incremened by (1530, 1530, 1440) to get an average of 1500 90K
unit increase. (1500 = 90k / 60), which equals two 17ms dutation then followed
by a 16ms duration frame to get an average of 16.6ms duration. The previous
commit for NEEDLEPLAT-2604 and 2057 are the efforts to solve this problem by
setting an initial phase, which can solve the problem for the uneven PTS for
23.97 and 29.97fps cases. However, for 60fps source, the initial phase can not
solve the problem because we can not maintain 1 vsync 1 frame switching always
because eventually we need drop a frame for every 1000 frames. It means that
during the playback, this initial phase will be shiftted. And when the vsync
switching happens at those uneven PTS boundary, the same problem happens.
[Solution] The change is a general frame switching improvement to avoid two
situations: a) In one vsync, there are two frames toggled (frame dropping),
but the next vsync there is no frame flipped because of its PTS has not arrived.
This will cause unnecessary frame dropping and what we do is to move the second
video frame to next vsync window. b) In one vsync, there are no frames be flipped
(frame repeating), but the next vsync will have more than 1 frame flipped. It's
also another frame dropping and what we do is to flip the next video frame in
this vsync instead. So the idea is to make the frame switching at video display
driver more smooth by avoid uneven frame flipping for each vsync. The timestamp
of the test clip is not correct, but we can use this method to make output
sequence smooth and avoid frame dropping.
[Platform]
needle,stark
[Test]
Verify with the special test clip according to the instruction. Verify
NEEDLEPLAT-2604 and 2057 also.
Change-Id: Ic4dfc8aa243cf01acae296ac53fc2587583e601f
Signed-off-by: shuanglong.wang <shuanglong.wang@amlogic.com>
PD#167718: Setup quality in driver probe so that
meson-rng can contribute to entropy pool.
Change-Id: I47aa7c83b9877f5bf08ac6837f36a648624d0040
Signed-off-by: Mingyen Hung <mingyen.hung@amlogic.com>
PD#167814: mtd: set chip type as slc by default.
newlly rebased upstream will report slc/mlc by
bit_per_cell which was not filled before.
Change-Id: Ibe23fcce6ab919cf3ceb19b5870bae13c3a52e0b
Signed-off-by: Yonghui Yu <yonghui.yu@amlogic.com>
PD#167811: hdmitx: fix no output when plugin dvi equipment
In uboot,hdmitx only output hdmi video stream. When plugin dvi
equipments, we choose dvi stream after reading edid.
Change-Id: Ic4dce29e98b9da58e8b79ffec3de933965b23ea3
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#167228: hdmirx: optimize recovery method for no signal issue
1.phy reset for no signal issue after esd test
2.run eq constantly if tmds can't lock
Change-Id: I1a4ad17459d1cdbb2e64f9d51830de9e0fffdb93
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#164844: add hsync adjust for ntscm
use a fixed vbi threshold 0x30 for vbi
Change-Id: Ia4d79a2b2b785bf86a976c519c44ef42fcb32d1a
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
PD#165701: di: enable read mif go field reset default
1.enable di pre and post read mif go field reset
2.enable vd1 and vd2 read mif go field reset
Change-Id: I74db04ed345f348a805634b3e97f381cfb532963
Signed-off-by: Dezhi Kong <dezhi.kong@amlogic.com>
PD#167713: pinctrl: fixed abnormal pulse signal problem
GPIO_O: control output level, and available in output mode
GPIO_OEN: control output enable; GPIO_OEN=0: output, GPIO_OEN=1: input
Precondition:
- GPIO_OEN=1
- GPIO_O=1
- Low level on pin
if we use the interface below to set pin to output mode and output low
level, the pin will generate abnormal pulse signal with about 1us.
gpio_direction_output(pin, GPIOF_OUT_INIT_LOW)
low -> high -> low
GPIO_OEN=1 GPIO_OEN=0 GPIO_OEN=0
GPIO_O=1 GPIO_O=1 GPIO_O=0
to solve the problem, we must ensure that the GPIO_O is set before the
GPIO_OEN.
low -> low -> low
GPIO_OEN=1 GPIO_OEN=1 GPIO_OEN=0
GPIO_O=1 GPIO_O=0 GPIO_O=0
Change-Id: I02bdcc46a40aeb7378799ecbafda3825704d1003
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
PD#167113: vdin: fix the green point problem.
When the vdin probe function is open,
there will be a green point at coordinate(0,0).
We need close vdin probe function default.
Change-Id: I47d1c4787a6633d2b044df5c8c0690137acce4f7
Signed-off-by: xuhua zhang <xuhua.zhang@amlogic.com>
PD#166821: mm: reduce cache line size
If cacheline size is set to 128, then smallest kmalloc is 128, this will
cause low memory usage for slab and waste lot of memory. For ARM64,
cacheline size is hardware set to 64 bytes. Reduce to 64 bytes can improve
usage for slab. And can help to save memory.
Change-Id: Id7f39bec324345d3e21f2a4e954803179fb54004
Signed-off-by: tao zeng <tao.zeng@amlogic.com>
PD#165782: hdmirx: keep esm work after signal unstable
Change-Id: I8a79276d48cdfb15c4b9d2833378b54591500b89
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#134355: use sprintf instead of printk in show functions
Change-Id: I79b104b3417b0f7d202ec1cde026ea6bad9c2103
Signed-off-by: Bo Yang <bo.yang@amlogic.com>
PD#165557: hdr set bt2020 output when connect hdr tv
Change-Id: I7409d48cffe471bd1276dc2158bfbc9d39073726
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
