VP share same vop aclk, so only when have one active vp we can adjust aclk
rate in psr mode.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I6c3ea84f5ab8a33d7c48e3c49c4426344e644a8a
Also support fit boot.img is symlink.
Change-Id: I1d2ebea389d0d8a2cbf19dee56832dd087c2c858
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
RVE/RGA use this feature.
Changes to vmlinux size:
Before:
text data bss dec hex filename
2547114 1011100 83856 3642070 3792d6 vmlinux
After:
text data bss dec hex filename
2549039 1011548 83856 3644443 379c1b vmlinux
delta: 2373 (dec)
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ic4bbb0c5769bba6968b449b545e4b0e970abae69
Bind interrupts and delayed works to big cpu, and limit the
minimum frequency of the cpu to 1.2G when hdmi is inserted.
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I66204c27d550f76224f1dc7087977a59257abdb8
If the color is YUV format, when resume or change resolution or plugin,
the first few frames of DMA is zero, Cause green screen display.
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: I8084e1c0b3c9b0e763fa8aae24994da6875b2f32
When HDMI0/1 are bound to the same VP, vop will only set one dclk rate,
The frequency of another dclk will not be changed. But HDMI driver will
set phy output frequency, The dclk core->rate does not correspond to the
actual phy output frequency. So dclk core->rate need to be updated when
enable dclk.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I497bf9a01b8210c17b1c720839fc8f5d15dd0baf
We try to avoid to create and look up parent domain hierarchy, which is
a normal way we need because it's indeed is a hierarchy. Instead we set
affinity via parent irq by using irq_set_affinity API.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I04252b956b7c29fb5c156f1c8ff59adf82d5c638
Fix the videobuf2-rdma-sg to videobuf2-cma-sg, and move it into
videobuf2 directory.
The videobuf2-cma-sg almost keep same as videobuf2-rdma-sg, both of them
are referenced from videobuf2-dma-sg. But the videobuf2-cma-sg also
support the videobuf2-dma-sg if the device's attr without force
contiguous attr.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I397fd5cbcd54a0575a34ecbc853dda9e53629892
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
if DMA_ATTR_FORCE_CONTIGUOUS to alloc contiguous pages and
dma alloc from rk_dma_heap default if it enable, else
alloc compacted pages.
Change-Id: Id1c020fd953e6b090ba734d1c41ed1c3d6932510
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
At present, it is the best way to distinguish by address,
the two configure different registers during the initialization process.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I2bbb0cfb6f2e33e25406b7d28ac22e5e035f64e3
The default voltage is high, so it is more appropriate to
use a falling edge.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I74a9ae7e0a2432c4050f2d305aeaa8d9f4f31e62
Now adjust the voltage through BGS, so don't need this part
of the code.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ia915cd0b2a3ac96386f96aee6204e477c3188f2a
Add a new instance for rockchip pinctrl to do selftest, and the userland
can set or get the iomux to one pin directly.
Build the iomux by gcc:
xx-gcc tools/testing/selftests/rkpinctrl/iomux.c -o iomux
Tested on rk3588-evb1:
[root@RK3588:/]# iomux 1 15 1
[root@RK3588:/]# iomux 1 15
mux get (GPIO1-15) = 1
[root@RK3588:/]# iomux 1 15 2
[root@RK3588:/]# iomux 1 15
mux get (GPIO1-15) = 2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ic5271b25e55e1023caa5580346ffb82fe7a4cb65
Add a new driver to create a device named /dev/iomux, which allows
userland to set or get iomux by bank index and pin index.
For now the /dev/iomux supports two commands:
- IOMUX_IOC_MUX_SET
- IOMUX_IOC_MUX_GET
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I0467af6885863f5dc69d513601f597fca2cc6948
Add rk_iomux_set and rk_iomux_get functions and export them, which can
set or get iomux by bank and pin index.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I2fa94c9fe7d28c545fc31033e70c26cd5c57fed7
According to the spec "USB Interface Association Descriptor Device
Class Code and Use Model"[1], the Interface Association Descriptor
(IAD) is needed for composite device which has multiple interfaces
controlled independently of each other. Without the IAD, the device
may not work as expected because the USB system software will not
properly bind the interfaces with drivers (e.g UAC1 && UVC composite
device not recognized in Win10).
[1] https://www.usb.org/sites/default/files/iadclasscode_r10.pdf
Change-Id: If88c43d20d6133c05a2d2c90507ff03fae21ecdf
Signed-off-by: William Wu <william.wu@rock-chips.com>
1. Use MPP_CMD_POLL_HW_IRQ to handle the hw slice irq.
Old MPP_CMD_POLL_HW_FINISH will wait hardware finish and skip hw irq.
2. Clear poll request msgs when it is handled.
NOTE: When MPP_CMD_POLL_HW_IRQ return slice with zero length the
current task is completed. This way can reduce an extra
MPP_CMD_POLL_HW_FINISH ioctl.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I2c81d85c236d4290a497c1747ae2f3e5ac1ce55c
Use task_id in taskqueue to identify each task while task_index in
mpp_dev will have conflict in multi-core case.
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Ia0c5acc9139cfba177fb828daed6c87750a47ef1
