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Author SHA1 Message Date
Cai YiWei
ff6946b2c1 media: rockchip: isp: match stream info for fast output 
Change-Id: I62029e1f98eb826ee9754ff7efa294fea5a11e7f
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-07-25 20:04:58 +08:00
Luo Wei
252cfbbe57 arm64: dts: rockchip: rk3588-vehicle-evb: include rk3588m.dtsi 
Change-Id: I53296521393a533f8d3495dc37ad189f5460c3af
Signed-off-by: Luo Wei <lw@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2022-07-25 17:35:13 +08:00
Shawn Lin
1f0f2da03c PCI: rockchip: rename PCIE_ATU_REGION_INDEX1 to DWC_ATU_REGION_INDEX1 
In order to make GKI work.

Fixes: 365ee62df1 ("PCI: rockchip: Add ACPI support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I46a696b5e69c858d660eab975bd24431f149c303
 2022-07-25 15:36:04 +08:00
Weiwen Chen
240dc3aac0 ARM: dts: rockchip: rv1103g-battery-ipc-v10: enable pwm10 and pwm11 
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I3c33094bd5ca475ee6b4abd437640c8d59d2a574
 2022-07-25 14:58:33 +08:00
Liang Chen
57b2d32f2c arm64: dts: rockchip: px30/rk3326: add some dtb into Makefile 
Change-Id: Ia9ec9980c50106aa91b50345f1eae598c03b87bc
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-25 14:56:40 +08:00
Liang Chen
e4ccb02ae8 arm64: dts: rockchip: px30: add alias for tsadc-otp-pin 
Many dts use the name "tsadc_otp_gpio".

Change-Id: I2e9cfc0d213a2e38cf6a116ac6473da845a186c0
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-25 14:54:16 +08:00
Liang Chen
cb57dca906 arm64: dts: rockchip: px30-evb-ddr4-v10: use px30-evb-ddr3-v10.dtsi as common config 
Change-Id: Ia230a5cdb8487d4fdb4f415dfd6dc1d7c09a492d
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-25 14:54:16 +08:00
Jianqun Xu
b8105eeb84 drm/rockchip: gem: partial sync use sg_phys instead of sg_dma_address 
The sg_phys() always return the physical address of a scattergather, but
the sg_dma_address() return the iova address, for a device without iommu
that is a bad address.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I83641c6af324bbaca3d27ea14de41cfca729e258
 2022-07-25 14:48:59 +08:00
Tao Huang
e9753da75a rk: clang-wrapper.py: ignore tcpci.h:195 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I11883190ba049ea61e70e89f7301f273934e9b13
 2022-07-25 14:31:20 +08:00
Tao Huang
78a3c0db57 dma-buf: cma_heap: Fix compile warning when !CONFIG_NO_GKI 
drivers/dma-buf/heaps/cma_heap.c:444:12: warning: unused function 'cma_heap_get_phys'

Fixes: 61a32e157e ("dma-buf: dma-heap: heap ops supports get_phys")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I206b96d402e89d2b89bdb6e4701150032647a219
 2022-07-25 14:19:04 +08:00
Guochun Huang
3611136b7f drm/bridge: maxim-max96755f: Add lock irq handler 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ieebaeadf9b051963dcba4a589a983e6188ef285d
 2022-07-25 10:27:30 +08:00
Wyon Bi
69882bde7f mfd: max96752f: Add support for enable GPIO 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I6fc6933f037d7f8cc53e3c8c49233a14c9301a1f
 2022-07-25 10:27:30 +08:00
Wyon Bi
9a01bbc010 drm/bridge: maxim-max96745: Add extcon support 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I3efe31517b2da16531b4afa7884247d6ce54504e
 2022-07-25 10:27:30 +08:00
Wyon Bi
d9a61536e3 drm/bridge: maxim-max96745: Add lock irq handler 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Id359495f13ccc7fda85ed7777cb72933433bda20
 2022-07-25 10:27:30 +08:00
Elaine Zhang
22cb9658be clk: rockchip: px30: mark clk_rtc32k_pmu as critical 
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I6f85ebd3bea1918b6938276295780f41a4ac197e
 2022-07-25 09:09:07 +08:00
Cai YiWei
a7ac5bd0e0 media: rockchip: isp: frame end config params_v32 for fast output 
Change-Id: I89c399fd2ac6c49cf4bd7265d573eca1f67b5625
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-07-22 18:04:47 +08:00
Liang Chen
cb3920f27c arm64: dts: rockchip: rk3568: add opp-table for rkvdec 
Change-Id: I354bb8fec302690c650522e6d88375a90e5ef606
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-22 17:39:41 +08:00
Tao Huang
9632355181 arm64: dts: rockchip: rk3568-iotest-ddr3-v10-linux: remove vdec-supply 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I62dc071aa4a51dcf60390e88fca0eedbc39a5a3c
 2022-07-22 17:39:35 +08:00
Jianwei Zheng
711167d7b0 phy: rockchip: inno-usb2: support rk3326s and px30s tuning 
Tuing pre-emphasis and turn off differential receiver in suspend mode
for rk3326s and px30s SoCs.

Fix some pc can not recognize the device when using 5m cable, so tuning
usb phy squelch trigger point configure to 100mv for px30s.

Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Change-Id: Ida216e8951c1f1dad19fa3ff4c31ede6a53b3458
 2022-07-22 17:37:15 +08:00
Liang Chen
41f9bdf3cf soc: rockchip: power-domain: keep pd_gpu always on for px30s 
Change-Id: Ieb81bdd80aaabb24d490c13be147cb3e1a1417dd
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-22 17:29:16 +08:00
Lin Jianhua
a4b711c431 arm64: dts: rockchip: rk3326-evb-lp3-v10-linux: update panel&ov5695 config 
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I570e64c3fa39c9997c76c0f659546dd08f56d5d9
 2022-07-22 17:27:06 +08:00
David Wu
ac1e59c0c7 arm64: dts: rockchip: Fix rmii clock mode for px30-evb-ddr3-v10 
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ie5c07e88c989ed95ebea6882b6a11c13563877b0
 2022-07-22 17:26:49 +08:00
Binyuan Lan
c36c33522e arm64: dts: rockchip: px30-evb-ddr3-v10: update panel/headset/bluetooth config 
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Change-Id: I4861887268ca77eeb1856cebd804a170af6ef602
 2022-07-22 17:26:35 +08:00
Liang Chen
f899544509 arm64: dts: rockchip: adjust regulator-min-microvolt of arm/logic for px30/rk3326 boards 
From 0.95v to 0.85v.

Change-Id: Iaeaf795e112965069a8a78ba09043e5a9a832ace
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-22 17:26:21 +08:00
Liang Chen
54152d59c5 arm64: configs: px30-linux: enable ARM_SCMI_PROTOCOL and CLK_SCMI 
Change-Id: I81ccfc295bb781e383a3815e1d5e23a9aad55b35
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-22 17:19:46 +08:00
Zefa Chen
0a724e69eb phy: rockchip: mipi-rx: support rk3326s mipi dphy rx 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ideca40caec6c7780fcc18058ea428605361c5b07
 2022-07-22 17:16:29 +08:00
Jianqun Xu
7790177484 power/avs: rockchip-io-domain: px30s not support pmuio1 1v8 mode 
Change-Id: I6e9a4d189788d4c0f8f900adf14bbcd4af44fb8c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2022-07-22 17:02:55 +08:00
Elaine Zhang
3724dcef5f clk: rockchip: px30: support px30s 
Change-Id: Id86199e066e254279d59a76aaed02f657b40e0c7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2022-07-22 17:02:55 +08:00
Shawn Lin
365ee62df1 PCI: rockchip: Add ACPI support 
Native APCI support for PCIe need firmware to initialize HW and provide
ECAM vectors via Mcfg and _CRS tables via root port descriptors. We
implement UEFI as firmware to cover HW part, so this driver must be used
under UEFI environment.

DW IP isn't ECAM compatible so we provide RKCP0001 as HID to workaround
ECAM scan, so that we can get DBI(_CRS) and Cfg space(_CBA) from ACPI.
Cfg space should be different from  Mcfg table for mapping.

rk_pcie_ecam_ops is registered as quriks for accessing different cfg space
in ACPI pcie lib.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I6a34768add6fd7030a187269955bcd6ed764c9e8
 2022-07-22 16:14:12 +08:00
Finley Xiao
a61b80cc7d arm64: dts: rockchip: Add opp table for rk3588m 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I115741fd45d22dcf6d844d3ccfced18ed4a7c6dc
 2022-07-22 15:21:04 +08:00
Finley Xiao
4bb7f23f4a cpufreq: rockchip: Implement rk3588_get_soc_info() 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3b8972b88917b15bd24b0d79bf28c03b796a32dc
 2022-07-22 15:21:04 +08:00
Tao Huang
26fdfc8a3d fiq_debugger: Do not call get_irq_regs() when !CONFIG_NO_GKI 
__irq_regs is missing from symbol list.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ie16ac110fda0e223b98bd35c96e561644798ef73
 2022-07-22 15:04:38 +08:00
Cai YiWei
90d1fa66e9 media: rockchip: isp: remove isp1x compatible 
Change-Id: I07b4302a473685c12b809c1020504d2919725baf
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-07-21 20:10:23 +08:00
Felix Zeng
b2f51e925e arm64: mm: Export __dma_map_area/__dma_unmap_area to support sram cache invalid/clean 
Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com>
Change-Id: Iaffc599649e98112ea4561e14e8af9be4f86b6dc
 2022-07-21 19:30:45 +08:00
Damon Ding
b93ccf0a10 drm/rockchip: vop: win may not support color_key 
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I05571f7a8d204b79d3724f45717446010cc38c5e
 2022-07-21 19:04:31 +08:00
Damon Ding
6616f0235c drm/rockchip: vop: add win2 color_key support for px30 
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I8204f52275179d8d65102c8fd71f214e9449ea5a
 2022-07-21 19:04:20 +08:00
Damon Ding
12138210a5 arm64: dts: rockchip: px30: fix vopb/vopl node 
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I536aad673dceb29316402cbbd7410474f16913ee
 2022-07-21 19:01:41 +08:00
Liang Chen
5239012921 arm64: dts: rockchip: px30: add uart1_rts_gpio config for pinctrl 
Change-Id: I67c682d1152d13b95c779bd98e8fe6fd8e212948
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-21 18:58:49 +08:00
Liang Chen
3fcb37924d arm64: dts: rockchip: rk3326-evb-lp3-v10: correct pinctrl-0 for tsadc 
The pinctrl-0 label of tsadc is modify by the follow commit:

    2bc65fef4f arm64: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio

Change-Id: I597b49b976824b23b65b41ea6c77f2a6bd653e98
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-21 18:56:53 +08:00
Liang Chen
1b8f6f73c1 arm64: dts: rockchip: rk3326: update config from kernel 4.19 
Change-Id: I613155e4fb6ba820dd927d6f921996441e273a0a
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-21 18:41:33 +08:00
Guochun Huang
5e39108372 arm64: dts: rockchip: px30: add rgb node 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I5a3f4a63279412a5f23588d8a057726caf3ccb6e
 2022-07-21 18:36:48 +08:00
Guochun Huang
fc219e8866 arm64: dts: rockchip: px30: Add support for video phy 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I958bf629c901099cfeeeed9a9723d31a0f87a7a7
 2022-07-21 18:12:49 +08:00
Finley Xiao
eb58d64914 soc: rockchip: power-domain: Fix delay for mem pd reset 
The delay is too small under low temperature environment.
The PHP mem pd should delay 35us at minus 40 degrees.

Fixes: 8729c661d5 ("soc: rockchip: power-domain: Fix panic when reset memory domain")
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8b748c8550e575cae5ca99636ce0892ddc48af40
 2022-07-21 09:37:38 +08:00
Jon Lin
7e5191e265 mtd: spi-nor: boya: Add code 
Support BY25Q256FSEIG.

Change-Id: I040ec8558756e21a938708e9d5752e80906502ab
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2022-07-20 19:11:49 +08:00
Sugar Zhang
478f288408 ASoC: rockchip: i2s-tdm: Add support for digital loopback 
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I235e560d99d393a724df9ffc74c7cb8cb347737a
 2022-07-20 18:55:54 +08:00
Sugar Zhang
9975bc50f3 ASoC: rockchip: Add support for Digital Loopback 
This patch add support for DMA-based digital loopback.

BACKGROUND
Audio Products with AEC require loopback for echo cancellation.
the hardware LP is not always available on some products, maybe
the HW limitation(such as internal acodec) or HW Cost-down.

This patch add support software DLP for such products.

Enable:

  CONFIG_SND_SOC_ROCKCHIP_DLP

  &i2s {
      rockchip,digital-loopback;
  };

Mode List:

  amixer contents
  numid=2,iface=MIXER,name='Software Digital Loopback Mode'
    ; type=ENUMERATED,access=rw------,values=1,items=7
    ; Item #0 'Disabled'
    ; Item #1 '2CH: 1 Loopback + 1 Mic'
    ; Item #2 '2CH: 1 Mic + 1 Loopback'
    ; Item #3 '2CH: 1 Mic + 1 Loopback-mixed'
    ; Item #4 '2CH: 2 Loopbacks'
    ; Item #5 '4CH: 2 Mics + 2 Loopbacks'
    ; Item #6 '4CH: 2 Mics + 1 Loopback-mixed'
    : values=0

Testenv:

wired SDO0 --> SDI0 directly to get external digital loopback
as reference.

Testcase: dlp.sh

  /#!/bin/sh

  item=0
  id=`amixer contents | grep "Software Digital Loopback" | \
      awk -F ',' '{print $1}'`

  items=`amixer contents | grep -A 1 "Software Digital Loopback" | \
         grep items | awk -F 'items=' '{print $2}'`

  echo "Software Digital Loopback: $id, items: $items"

  mode_chs() {
          case $1 in
          [0-4])
                  echo "2"
                  ;;
          [5-6])
                  echo "4"
                  ;;
          *)
                  echo "2"
                  ;;
          esac
  }

  while true
  do
          ch=`mode_chs $item`
          amixer -c 0 cset $id $item
          arecord -D hw:0,0 --period-size=1024 --buffer-size=4096 -r 48000 -c $ch -f s16_le \
                  -d 15 sine/dlp_$item.wav &
          sleep 2
          for i in $(seq 1 10)
          do
                  aplay -D hw:0,0 --period-size=1024 --buffer-size=8192 $((ch))ch.wav -d 1
          done
          pid=$(ps | egrep "aplay|arecord" | grep -v grep | awk '{print $1}' | sort -r)
          for p in $pid
          do
                  wait $p 2>/dev/null
          done
          item=$((item+1))
          if [ $item -ge $items ]; then
                  sleep 1
                  break
          fi
  done
  echo "Done"

Result:

do shell test and verify dlp_x.wav:

* Alignment: ~1 samples shift (loopback <-> mics).
* Integrity: no giltch, no data lost.
* AEC: align loopback and mics sample and do simple AEC, get clean
  waveform.

Logs:
...
numid=2,iface=MIXER,name='Software Digital Loopback Mode'
  ; type=ENUMERATED,access=rw------,values=1,items=7
  ; Item #0 'Disabled'
  ; Item #1 '2CH: 1 Loopback + 1 Mic'
  ; Item #2 '2CH: 1 Mic + 1 Loopback'
  ; Item #3 '2CH: 1 Mic + 1 Loopback-mixed'
  ; Item #4 '2CH: 2 Loopbacks'
  ; Item #5 '4CH: 2 Mics + 2 Loopbacks'
  ; Item #6 '4CH: 2 Mics + 1 Loopback-mixed'
  : values=2
Recording WAVE 'sine/dlp_2.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Playing WAVE '2ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
...
numid=2,iface=MIXER,name='Software Digital Loopback Mode'
  ; type=ENUMERATED,access=rw------,values=1,items=7
  ; Item #0 'Disabled'
  ; Item #1 '2CH: 1 Loopback + 1 Mic'
  ; Item #2 '2CH: 1 Mic + 1 Loopback'
  ; Item #3 '2CH: 1 Mic + 1 Loopback-mixed'
  ; Item #4 '2CH: 2 Loopbacks'
  ; Item #5 '4CH: 2 Mics + 2 Loopbacks'
  ; Item #6 '4CH: 2 Mics + 1 Loopback-mixed'
  : values=6
Recording WAVE 'sine/dlp_6.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Playing WAVE '4ch.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 4
Done

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5772f0694f7a14a0f0bd1f0777b6c4cdbd781a64
 2022-07-20 18:55:12 +08:00
William Wu
ba8a6e65a7 phy: rockchip: inno_usb2: only reset phy if deassert iddq for rk3588 
The current code always reset the usb2 phy in the
rk3588_usb2phy_tuning(), this cause the usb core
reset the device which connected to the usb2 host
interface during pm resume. Actually, it only needs
to reset the phy when it exit from iddq mode, so
add this patch to reset phy more reasonably, and
avoid reset usb device during pm resume.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I296636321d0cbe6b7ee7be9bd1614237a34312e9
 2022-07-20 18:48:22 +08:00
Andy Yan
f5502856e3 drm/rockchip: vop2: A workaround for PD_ESMART on/off 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic7a23c62da91b5e996a9c790ea6ff48ca4e0bf2c
 2022-07-20 18:44:58 +08:00
Sach Lin
26e054631c ARM: dts: rockchip: v1106-smd-cam: add ir isp pipe line. 
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: I058055f4da926335cc0189f7fe7675610f1bc813
 2022-07-20 18:40:53 +08:00
Liang Chen
bf32acea0a arm64: dts: rockchip: px30: modify node name to dwmmc for sdmmc/sdio/emmc 
The name "mmc" is not match for Android config:

    RPODUCT_BOOT_DEVICE := ff390000.dwmmc.

Error log:
init: realpath failed: /dev/block/by-name/super: No such file or directory

Change-Id: Ic72ed3c083c25b2ec243ad10e4fa02e8fd7c8245
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-07-20 18:38:18 +08:00