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Author SHA1 Message Date
Tao Huang
0905a4c0bc PCI: rockchip: dw: Fix module building 
dw_pcie_write_dbi2() is not export.
irq_set_affinity() is not export before v5.14.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I780ed626c1b99f1bd7af7798582a62235003fbf6
 2022-04-20 16:06:08 +08:00
David Wu
b74d7b9698 ethernet: stmmac: Add flag to sync whole allocation to device at rx_buffer init 
Compared with rx refill, the buffer at initialization level also needs
to do this action to avoid being flushed into wrong data after rx received
data.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Icad68f5e22c4dc3dc5ee007b2bc0d3120ceefbc9
 2022-04-20 16:05:05 +08:00
Lin Jinhan
4388a12992 crypto: rockchip: add multi lli support 
256 LLI were pre-allocated for multiple scatter lists
 to complete in one calculation.If sg nents exceeds
 256 in a single calculation, the calculation is
 divided into multiple calculations.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I39282efc5a2743e12bd33daa94c89a2ed83fb400
 2022-04-20 15:07:15 +08:00
Lin Jinhan
f7ad86570f crypto: rockchip: move alignment check to rk_crypto_utils 
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I5d578417308195eb7167ea09302fc4cce9cc59a1
 2022-04-20 15:07:15 +08:00
Lin Jinhan
16e0a89366 crypto: rockchip: remove check_from_dmafd judgment 
Unify the process regardless of whether the data comes from DMA buffer.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I140f0e03b39c8d7b37af2cc76e3aa314f29a73c7
 2022-04-20 15:07:15 +08:00
Zefa Chen
84b2ca0bd1 arm64: dts: rockchip: rk3588 support config multiple virtual node of vicap 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I650bc628fc930400134647cf727ef7c300ddbc65
 2022-04-20 14:48:39 +08:00
Sach Lin
a70a70dc1e media: rockchip: vicap: sditf sub sensor add quick stream and get sync mode. 
Signed-off-by: Sach Lin <sach.lin@rock-chips.com>
Change-Id: I558a1f4048b8be2d9aef45ac0d857231bce3764f
 2022-04-20 14:39:53 +08:00
Ziyuan Xu
67426129b0 ARM: rockchip: Locate kernel at 0x00208000 for RV1106 when CONFIG_ROCKCHIP_THUNDER_BOOT=y 
The memory layout for rv1106 thunder boot feature:

SPL:       0 ~ 256KB
RTOS:      256KB ~ 512KB
SPL S & H: 512KB ~ (2MB - 8KB)
ATAGS:     (2MB - 8KB) ~ 2MB
UBOOT:     2MB ~
KERNEL_R:  (2MB + 0x8000) ~ (10MB - 128KB)
DTB:       (10MB - 128KB) ~ 10MB
RAMDISK_R: 10MB ~ 20MB
KERNEL_C:  20MB ~ 25MB
RAMDISK_C: 25MB ~ 30MB

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ib1456c8f399cdeda391ba459b22097b0f5810e53
 2022-04-20 09:56:50 +08:00
Zefa Chen
b404b93cfb media: rockchip: vicap: support multiple channels raw combine to one channel 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I9739879aef4ddba260ae9505035248d498ea63ee
 2022-04-19 18:28:30 +08:00
Cai YiWei
ef4515e7c8 media: rockchip: isp: to support vicap merge raw 
Change-Id: Ifc8a4216399b33106c8d044b70cef008b6a3cb7d
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-04-19 18:28:17 +08:00
Yu Qiaowei
98db520196 video: rockchip: rga3: Add check for RGA2_MMU 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I2c4999611056d25dd195c212d2fcba9afd24aca4
 2022-04-19 18:25:26 +08:00
Yu Qiaowei
32e08a6ad5 video: rockchip: rga3: Add debug log for rga_mm 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I6c95f87a3d16275704a2011b4ef28990484da075
 2022-04-19 18:25:26 +08:00
Huibin Hong
bb25b636df irq-gic: read AIAR instead of IAR when FIQ_GLUE is enable 
If FIQ_GLUE is enable, uart interrupt is group0, but all
other interrupts are group1. AIAR is for group1, IAR is
for group0 and group1. We need IRQ handles group1 interrupts
only, FIQ handles group0 interrupts.

Fixes: 4c9f0407c6 ("irq-gic: support fiq")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I062e6cafcd8728165b6eda8b82f92f7a90672132
 2022-04-19 17:52:16 +08:00
Finley Xiao
a3486b7554 clk: rockchip: rk3588: change pll to slow mode before power down 
Make the downstream mux work fine，fix reboot and suspend issues.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I06e6f6c22238da6aec0a8690564743dff02db0ad
 2022-04-19 10:57:09 +08:00
Finley Xiao
907260b017 clk: rockchip: rk3588: change pll mode register for cpu 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia258b7a152c3458f488a63c5f2ca1a6478f854a0
 2022-04-19 09:12:51 +08:00
Alex Zhao
b96485b7af arm64: dts: rockchip: rk3588s fix sdio pins to pull up 
The sdio requires the cmd and data pins to pull up by soc.

Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Change-Id: I7390dad3e1af19c5cae778064e49e47eb8514baf
 2022-04-19 09:11:53 +08:00
David Wu
0940193c47 ethernet: stmmac: dwmac-rk: Set input/output before disable pclk_gmac 
For rk3588, the input/output of the clock direction needs to set
the php_grf register, and the pclk of php_grf is associated with
pclk_gmac, so you need to set the input/output before closing
pclk_gmac.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Idddec040660aaadd80d7dd6d8aba6220b65425fe
 2022-04-18 18:54:10 +08:00
Tao Huang
2f4b611c2a clk: rockchip: Add ROCKCHIP_DDRCLK Kconfig 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I5569cb9b52dd1f7fb702d8a37aef494fcc189c2c
 2022-04-18 15:49:38 +08:00
Huang zhibao
9a489d57b7 arm64: dts: rockchip: rk3588-nvr: add dts for nvr demo3 v10 board 
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: If6301e713a1f3e1b4ec983cec94d705e7855538c
 2022-04-18 14:57:04 +08:00
shengfei Xu
335ee47416 arm64: dts: rockchip: rk3588-rk806-single: initialize the configuration of NLDO5 
The single-pmic configuration is based on the EVB7

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: If3e9136ce9e0ebbd50780bc7d06481e6c69bcf12
 2022-04-18 14:52:56 +08:00
XiaoDong Huang
443afabe9c arm64: dts: rockchip: rk3588s: reserve 0~4k and 960~1024k of syssram 
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Ib554e9f020abdc31f5eeb93bd1f0730d576bec8b
 2022-04-18 14:51:50 +08:00
Algea Cao
22bdb72e37 drm/bridge: synopsys: dw-hdmi-qp: Set hdcp2 bypass when dvi mode 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I7c14a2398f9c1304a40a5c987eadde0e23fac1d1
 2022-04-18 14:50:50 +08:00
Tao Huang
84a182ce57 Revert "arm64: rockchip_gki.config: Enable CONFIG_RK_NAND" 
This reverts commit 6fbbbac945.
Which make eMMC boot failed.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I7ed10941a1031d752a0a7567f60fd42304a33d03
 2022-04-18 12:22:06 +08:00
Elaine Zhang
8b5833cb37 Revert "clk: composite: Add support to change brother clock rate" 
This reverts commit c1a61a70dc.

Change-Id: I26da50110300d4147049fd56a8d09dde9a0f611d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2022-04-18 09:59:31 +08:00
Elaine Zhang
f5f47389d4 Revert "clk: rockchip: implement the composite brother branch type" 
This reverts commit d433943b34.

Change-Id: I9d7fc94a30a65e1804ec836e113a4b930c2ab663
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2022-04-18 09:59:31 +08:00
Elaine Zhang
5e82d7c4b7 clk: rockchip: remove COMPOSITE_BROTHER 
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Iacbdbcb4bf8f87f6f10f2b1543292c7831e3677c
 2022-04-18 09:59:31 +08:00
Elaine Zhang
0df9c9491c Revert "clk: rockchip: Add supprot to limit input rate for fractional divider" 
This reverts commit 5abd502598.

Change-Id: Ib2301076fe703c92cd08c82c3f45771c3e6f3826
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2022-04-18 09:59:31 +08:00
Elaine Zhang
5c50edccbe Revert "clk: rockchip: add a COMPOSITE_DCLK clock-type" 
This reverts commit 124c0977a0.

Change-Id: I2e93b3c5fda206c07c6a218bfc4e3ee727ea9fbe
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
 2022-04-18 09:59:31 +08:00
Finley Xiao
401836675e cpufreq: rockchip: Fix build error when build as module 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie3eb49fa245a970a953c496d4c26300cea4dc18f
 2022-04-18 09:57:27 +08:00
Tao Huang
925ab43971 arm64: rockchip_gki.config: simple and sync with rockchip_defconfig 
Only support RK3588:
-CONFIG_CPU_PX30=y
-CONFIG_CPU_RK3328=y
-CONFIG_CPU_RK3368=y
-CONFIG_CPU_RK3399=y
-CONFIG_CPU_RK3568=y

-CONFIG_MALI400=m
-# CONFIG_MALI400_PROFILING is not set
-CONFIG_MALI450=y

-CONFIG_MALI_DEBUG=y
-CONFIG_MALI_DEVFREQ=y
-CONFIG_MALI_DT=y
-CONFIG_MALI_EXPERT=y
-CONFIG_MALI_MIDGARD=m
-CONFIG_MALI_PLATFORM_THIRDPARTY=y
-CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk"
-CONFIG_MALI_SHARED_INTERRUPTS=y

Disable ION:
-CONFIG_ION=y
-CONFIG_ION_SYSTEM_HEAP=y

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ibf188b9d8385440294bb81288ae693694e5dc546
 2022-04-16 17:20:52 +08:00
Zefa Chen
a8109ffafd media: rk_ircut: return error if ioctl not supportted 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I6219df0f4db9244195d5722e7b8c81fac9410b32
 2022-04-16 16:32:11 +08:00
Zhichao Yu
ad4221ec5a ARM: configs: rv1106: enable CONFIG_COMMON_CLK_PROCFS 
Signed-off-by: Zhichao Yu <zhichao.yu@rock-chips.com>
Change-Id: I29cee4152ad16ddd91fb240f1e1058cd4a1488df
 2022-04-16 16:15:05 +08:00
Huang zhibao
8e91c976b1 ARM: dts: rockchip: rv1106-uvc-demo: remove clk always on 
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Ic2106dc3b71b775a6f6227089e832c8a8af54c87
 2022-04-16 16:10:56 +08:00
Zhang Yubing
d8004e3b97 drm/rockchip: dw-dp: filtering unexpected hotplug event. 
When reset the dp controller, if a DP device is connected, the dp
controller will generate a hotplug irq, which is a unexpected hotplug
event.

To filter this hotplug event, disable irq before reset the DP
controller. After dp controller reset, wait the first hotpulg event
then clearing the hotplug interrupt status bit and enable dp
controller irq.

Fixed:
commit f14693316b ("drm/rockchip: dw-dp: reset dp controller status")

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ic4cabd3b816121b2d1109a5bbfe608f615971953
 2022-04-15 18:50:41 +08:00
Cliff Chen
b988b52e76 ARM: configs: rockchip: rv1106: switch to preempt voluntary 
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
Change-Id: Ib1ca6e64673104ac40e861f7dbe119aa5fd6895b
 2022-04-15 18:45:46 +08:00
Yu Qiaowei
383ed4e002 video: rockchip: rga3: Support import buffer with size 
Update driver version to 1.2.9

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I26e4142b7b9d62a222fa5bd503dac232840022a2
 2022-04-15 17:24:19 +08:00
Zhichao Guo
1aed8950e0 ARM: dts: rockchip: RV1103G EVB support SPI NOR and SD card 
Signed-off-by: Zhichao Guo <zhichao.guo@rock-chips.com>
Change-Id: Ieee013b2dca2503c02c954ceb6e09c1c0a0f9b02
 2022-04-15 17:06:17 +08:00
Zhichao Guo
e82c835c43 ARM: configs: rv1106-evb.config support SPI NOR and JFFS2 
Signed-off-by: Zhichao Guo <zhichao.guo@rock-chips.com>
Change-Id: Ib3c4ce2486f22dd0553f6bd00bad52e821791a4c
 2022-04-15 17:06:17 +08:00
Yu Qiaowei
e98db0e5b0 video: rockchip: rga3: Modify the minimum input and output of rga3 to 68*2 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I27282033ee15bed15dcbbf4e8ac96524a72a86ff
 2022-04-15 11:42:36 +08:00
Yu Qiaowei
da876cd68e video: rockchip: rga3: Support third-address YUV using buffer_handle 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ie6d54b96773d708355cac988217189eb56396d27
 2022-04-15 11:42:27 +08:00
Yu Qiaowei
4ca6886a26 video: rockchip: rga3: Fix memory leak caused by temporary ctx 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I89e50b9210919a4da19f5f45bb9135c78f174dec
 2022-04-15 10:31:43 +08:00
Cai YiWei
3bfcd0e9a6 media: rockchip: isp: fix bay3d ds size for isp32 
Change-Id: Id815ac98466e4b76feb01925c66451bed8c1fc6f
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-04-15 10:23:25 +08:00
Huang zhibao
ff0bc31061 ARM: dts: rockchip: add dts for rv1106 uvc demo board 
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Ida1820188cb5b293f5a9a6dda7b1da88193bd895
 2022-04-14 19:56:31 +08:00
Tao Huang
e8c0569ca5 ARM: rv1106_defconfig: update by savedefconfig 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I075cff13eb3b747e46a84b71c1fcd6d79c320d7e
 2022-04-14 15:50:52 +08:00
Sugar Zhang
ffb8ca97ff ARM: Kconfig: Disable HAS_MODULE_STRICT_RWX for ROCKCHIP_MINI_KERNEL 
- ARCH_HAS_STRICT_MODULE_RWX

Tested on RV1103G IPC: save ~200KB

Before:

VmallocUsed:        1752 kB

After:

VmallocUsed:        1552 kB

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ibebd5157709e8557800495c43d58e55194f034d3
 2022-04-14 15:50:37 +08:00
Sugar Zhang
ed3e2d3626 ARM: configs: rv1106: Enable CONFIG_ROCKCHIP_CPUINFO 
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I333bbc0c691527d1d9a2ea3a99759447f16570d2
 2022-04-14 15:47:21 +08:00
Yu Qiaowei
ea668873c6 video: rockchip: rga3: Fixed the calculation error of v_address when map vir_addr 
Update driver version to 1.2.8

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I1426e1a3ac0b59b3eb6497c4b92921e918638653
 2022-04-14 15:17:25 +08:00
Yu Qiaowei
20b9b5e9ed video: rockchip: rga3: fix crash in insmod/rmmod ko 
1. Platforms without MMU do not alloc buffer for mmu_base.
2. Fix deregister using wrong miscdevice structure.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I46613530dd32e6a21abbedc5df31342ab335c607
 2022-04-14 15:17:25 +08:00
Sandy Huang
71270c6e64 drm/rockchip: vop2: correct linear format support for cluster 
rk356x cluster:
	rgb/yuv format: support non-linear mode only

rk3588 cluster:
	rgb format: support linear and non-linear mode
	yuv format: support non-linear mode only

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ic5cc4690280ba3974301dfd831b445a8a0f9d6b0
 2022-04-14 15:17:04 +08:00
Sandy Huang
183bc1a692 drm/rockchip: vop2: reset transform offset when exit from afbc format 
If cluster transform offset isn't equeal to 0 at linear format mode, VOP will appear
iommu pagefault error.

errr log:

[ 8283.190920][    C0] rk_iommu fdd97e00.iommu: Page fault at 0x00000000f20b1000 of type read
[ 8283.191012][    C0] [drm:rockchip_drm_fault_handler] *ERROR* iommu fault handler flags: 0x18b
...
[ 8283.191131][    C0] Video Port0: DISABLED
[ 8283.191153][    C0] Video Port1: DISABLED
[ 8283.191198][    C0] SYS:
[ 8283.191252][    C0] 00000000: 00008008 40176786 7fffffff 00000000
[ 8283.191281][    C0] 00000010: 00000000 00000000 00000000 00000000
...
[ 8283.191715][    C0] OVL:
[ 8283.191765][    C0] 00000000: c0000000 75643120 e4e47531 00000000
[ 8283.191792][    C0] 00000010: 00000000 00000000 00000000 00000000
...
[ 8283.195257][    C0] Cluster3:
[ 8283.195306][    C0] 00000000: 00004001 00000000 000000e6 00000000
[ 8283.195333][    C0] 00000010: f2057000 00000000 00000030 00000000
[ 8283.195361][    C0] 00000020: 077f002f 077f002f 00000408 00000000
[ 8283.195389][    C0] 00000030: 00000000 00000000 00000000 00020009
[ 8283.195417][    C0] 00000040: 00000000 00000000 00000000 00000000
[ 8283.195445][    C0] 00000050: 00000010 00000000 f396a000 00290500
[ 8283.195473][    C0] 00000060: 048b028d 003a0139 00000000 00000094
...

[ 8283.199008][    C0] rockchip-vop2 fdd90000.vop: [drm:vop2_isr] *ERROR* POST_BUF_EMPTY irq err at vp3
[ 8283.199303][    C0] rockchip-vop2 fdd90000.vop: [drm:vop2_isr] *ERROR* POST_BUF_EMPTY irq err at vp3
[ 8283.199377][    C0] rockchip-vop2 fdd90000.vop: [drm:vop2_isr] *ERROR* POST_BUF_EMPTY irq err at vp3

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ib490796e1da568069f78ed35b2287a5fe32033d9
 2022-04-14 10:15:46 +08:00