Commit Graph

1066174 Commits

Author SHA1 Message Date
Huang zhibao
b66c6faa49 arm64: rockchip_linux_defconfig: enable CONFIG_ROCKCHIP_DW_DP
Enable the DP driver used on Rockchip RK3588 SoC.

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I4d645edebf90ceaa35b52b0ccf029c17d1a51e67
2021-11-17 17:00:00 +08:00
Jianqun Xu
48ce88b1b5 arm64: dts: rockchip: fix rk3588s to use tsadc_shut iomux
To use tsadc_shut function, tsadc must switch to cru_shut_mode,
because tsadc_shut signal have to go through the cru to get to
tsadc_shut signal.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I9bc816db35bdf1c107db4e301d9f3353cb651dcf
2021-11-17 16:15:44 +08:00
Huang zhibao
799f5e763c arm64: dts: rockchip: rk3588-nvr-demo: fix pcie3.0 reset io
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I12030801ef502af553239702e06f52ac18f39e8e
2021-11-17 16:14:32 +08:00
Dongbo Yang
0b27ae1db5 misc: add driver for rk803.
Signed-off-by: Dongbo Yang <db.yang@rock-chips.com>
Change-Id: Ieba56551c48ed42f7f24c631b117d40a6e14a8f4
2021-11-17 16:14:04 +08:00
Kever Yang
a3a5483632 arm64: dts: rockchip: rk3588-evb: Add pcie3-phymode setting
rk3588 boards may have different pcie3-phymode, default as below id not
set:
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: If158eb47f679d0c7b184b6bd64262d0f764b97f3
2021-11-17 16:08:30 +08:00
Kever Yang
70c3026b5f arm64: dts: rockchip: rk3588: Include phy-snps-pcie3.h
rk3588 boards may have different pcie3-phymode.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I76825c09014481a06af4c04d0b9b1cc0fee89a8d
2021-11-17 16:08:30 +08:00
Huang zhibao
1bae377ec6 arm64: dts: rockchip: rk3588-nvr-demo: add regulator-init-microvolt
Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: I5edd9b064f08e6249654678826cadb00caa75deb
2021-11-17 16:08:30 +08:00
Mark Huang
09a6f92f07 arm64: dts: rockchip: rk3588-nvr: enable gpu
Signed-off-by: Mark Huang <huangjc@rock-chips.com>
Change-Id: I0e6f97011882db50feb45b5794706bdcf2cdfe94
2021-11-17 14:16:14 +08:00
Frank Wang
b1368b8774 arm64: dts: rk3588: revert peripheral dr_mode for usbotg0
Restore usbotg0 dr_mode to "otg" that Type-C controller can switch the
mode via "role_switch" callback for RK3588 EVB1, EVB3 and EVB4.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I6e7d83acb468d50e31ffdfdee6adcd7c5330d776
2021-11-17 14:15:43 +08:00
Simon Xue
400193dc28 arm64: rockchip_defconfig: Enable CONFIG_ARM_SMMU_V3
There are two MMU600 instances in RK3588.

Change-Id: Iec54e5a9135bbdda01b0bcbe6681cee22ff775ac
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2021-11-17 11:51:15 +08:00
Guochun Huang
42d1582e64 drm/panel: simple: fix unexpected pps packet sending
use helper functions to send dsi picture parameter set data
type packets, the size of struct drm_dsc_picture_parameter_set
is 128 bytes, it may be greater than the size of pps panel required,
so the redundant part should default to zero.

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I8b937b052cc0d579dd78859ef1aa04aea818d694
2021-11-17 11:22:04 +08:00
Wyon Bi
29d3f8c8b9 drm/rockchip: dw-dp: Fix audio infoframe buffer offset
drivers/gpu/drm/rockchip/dw-dp.c:1911 dw_dp_audio_infoframe_send()
error: hdmi_audio_infoframe_pack() '&buffer[4]' too small (26 vs 30)

Fixes: 9548fbb10c ("drm/rockchip: Add support for Synopsys DesignWare Cores DPTX")
Change-Id: I34142ae76b428c4ada3debfe80698af63ffd8f1f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-11-17 11:17:56 +08:00
Shunhua Lan
ec1a0d929d ASoC: es8323: enable route config
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ia18a01afbd72195871d847ee3a17e7a7f9dca1c2
2021-11-17 11:16:54 +08:00
Sugar Zhang
72c304699f clk: rockchip: rk3588: Add audio fracpll freq
983040000 for SR:
  8k, 16k, 24k, 48k, 96k, 192k

903168000 for SR:
  11.025k 22.05k, 44.1k, 88.2k, 176.4k

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ibd4ab8e18cfc1e973d62b920084cfbe8d3000b0d
2021-11-17 09:37:15 +08:00
Shaleen Agrawal
775cd2119d ANDROID: qcom: Add smp_call_function_single_async to ABI
Need to add additional symbol in execution path to ABI list.

Bug: 176077958
Change-Id: I676b4f9a016c825572d10de49b6062a90078f2f2
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2021-11-16 13:18:07 -08:00
Rick Yiu
d736cbf8d9 Revert "sched/fair: Keep load_avg and load_sum synced"
This reverts commit 4c37b062ed.

Bug: 205915994
Test: build pass
Signed-off-by: Rick Yiu <rickyiu@google.com>
Change-Id: Ifb4ca2d5beab425665b1cc047899e33ceb0ded23
2021-11-16 21:07:58 +00:00
Rick Yiu
de0ba4ea3c Revert "sched/pelt: Ensure that *_sum is always synced with *_avg"
This reverts commit 813ff24f1d.

Bug: 205915994
Test: build pass
Signed-off-by: Rick Yiu <rickyiu@google.com>
Change-Id: I77d9a103d71da43ce2fe9b630c7a5e12b62e8e42
2021-11-16 21:06:58 +00:00
Rick Yiu
8630facf34 Revert "sched/fair: Ensure _sum and _avg values stay consistent"
This reverts commit 20285dc271, which
causes serious performance downgrade because the calculated cpu
frequency will be much lower than before due to change of cpu util.

Bug: 205915994
Test: build pass
Change-Id: I68dced7a58547a3324fcfeebea6c02bb30c4182d
Signed-off-by: Rick Yiu <rickyiu@google.com>
2021-11-16 21:05:40 +00:00
mazhenhua
7a7b5f89d9 ANDROID: locking/rwsem: only clean RWSEM_FLAG_HANDOFF when already set
sem->count will be negative after writer is killed
if flag RWSEM_FLAG_HANDOFF is not set, we shouldn't clean again

            CPU2                                 CPU4
    task A[reader]                         task B[writer]
    down_read_killable[locked]
    sem->count=0x100

                                           down_write_killable
                                           sem->count=0x102[wlist not empty]
    up_read
    count=0x2
                                           sig kill received
    down_read_killable
    sem->count=0x102[wlist not empty]

                                           goto branch out_nolock:
                                           list_del(&waiter.list);
                                           wait list is empty
                                           sem->count-RWSEM_FLAG_HANDOFF
                                           sem->count=0xFE
                                           list_empty(&sem->wait_list) is TRUE
                                           sem->count andnot RWSEM_FLAG_WAITERS
                                           sem->count=0xFC
    up_read
    sem->count-=0x100
    sem->count=0xFFFFFFFFFFFFFFFC
    DEBUG_RWSEMS_WARN_ON(tmp < 0, sem);

Bug: 204595609
Link: https://lore.kernel.org/all/a630a9aa-8c66-31c9-21a0-3d30bde2c9df@redhat.com/T/
Signed-off-by: mazhenhua <mazhenhua@xiaomi.com>
Change-Id: Ife64c179335d74768a3d68e402c72d10148f3e7e
2021-11-16 18:07:21 +00:00
Shawn Lin
ee99fe07a7 PCIe: rockchip: Add more legacy int support
Some vendor drivers rely on flow control by toggling
enable/disable virtual irq if using legacy interrupt.
It can certainly change the behaviour by function
drivers, but adding corresponding operations would make
RC driver more flexible.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Idf3e6a0ca9c4ebde369745713a88db53e3f72ea5
2021-11-16 21:42:05 +08:00
Herman Chen
1933399fa0 video: rockchip: mpp: Fix error on mmu disabled
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Iba451314c8708de16a83af70bf4043da6341610b
2021-11-16 21:39:00 +08:00
Algea Cao
9849816257 arm64: dts: rockchip: Add rk3588s/rk3588 evb hdmi2.1/hdmi2.0 switch gpio
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5f2ff51c634e690539e8468d34ee96f61576463d
2021-11-16 21:38:41 +08:00
Algea Cao
5d5fd11a6b arm64: dts: rockchip: rk3588: Add hdptx hdmi phy1 node
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ibbdf50fd1bc65d529fbbaa99db95d971abdcbdc8
2021-11-16 21:38:41 +08:00
Algea Cao
3fc0de144c arm64: dts: rockchip: rk3588s: Add hdptx hdmi phy0 node
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I99484d5a6c0c74612d40586a76bc946549f333eb
2021-11-16 21:38:41 +08:00
Alex Zhao
4e0db1dc60 arm64: rockchip_defconfig: Enable CONFIG_R8168
Add RTL8111HS ethernet card support for RK3588_EVB

Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Change-Id: I0bfe2b088435830f3be08956dab2aedded5b73f7
2021-11-16 21:38:01 +08:00
Wyon Bi
9548fbb10c drm/rockchip: Add support for Synopsys DesignWare Cores DPTX
Add a new driver for Synopsys DesignWare Cores DPTX IP used
in Rockchip RK3588 SoC. The DPTX is compliant with the
DisplayPort Specification Version 1.4.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I0588aae8b3c9ae19ab7ee5d2c86673aa35cee2ff
2021-11-16 21:24:46 +08:00
Wyon Bi
c863c86b61 arm64: rockchip_defconfig: enable CONFIG_ROCKCHIP_DW_DP
Enable the DP driver used on Rockchip RK3588 SoC.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I9b6c817746c74bc3f50df302dfbdae1e80324fb8
2021-11-16 21:24:46 +08:00
Guochun Huang
f218e21726 drm/rockchip: dsi2: fix dsi2 host configuration process
in order to switch dsi2 working mode, operation DSI2_PWR_UP from
power on to power off and then power on, it may trigger dsi2 host
to send unexpected cmd to panel, resulting in panel abnormality,
therefore, do not operate DSI2_PWR_UP when switching the working
mode.

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I78d969dbc16262c9f7367fe5c25688d84cb1f935
2021-11-16 21:21:11 +08:00
Guochun Huang
1412119f85 drm/rockchip: dsi2: config ipi color depth/format in grf field
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I2be5cdb2a73836b8c40875cd23aa6737d49915d9
2021-11-16 21:21:11 +08:00
Zhang Yubing
5e73ad7c2f phy: rockchip: usbdp-phy: fix dp lane select issue
1 rk3588_udphy_cfgs is used to define const data, remove
dp lane map grf register from it;
2 fix the dp lane mapping mismatch issue.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I3c179596c0c9c961afb0f0ee46a3b5f0f01d23a1
2021-11-16 19:37:37 +08:00
Zhang Yubing
49fd30eb91 phy: rockchip: usbdp-phy: add phy_set_bus_width when power on
In usbdp-phy, the DP function  can use all or only part of
the phy lanes.  This info need notify DP controller.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ib943532d7a764602392837f9a9163af00e8e7918
2021-11-16 19:37:23 +08:00
Zhang Yubing
8081c70a82 phy: rockchip: usbdp-phy: add pointer check, avoid NULL pointer
When enter DP mode, exit DP mode, disconnect device, the data
is NULL. And only check the hpd is connect, set the gpio.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I7a3558c5ee5f954055fdd5edbbd50b5079d8f323
2021-11-16 19:37:17 +08:00
Zhang Yubing
3fb391ad45 phy: rockchip: usbdp-phy: fix the swing and pre-emphasis lane set
According the dp lane mapping, set the swing and pre-emphasis
to phy lane.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I77bec31a8a7b026db7e799991157114273ab0d4c
2021-11-16 18:50:33 +08:00
Zhang Yubing
266df05c62 arm64: dts: rockchip: add rk3588/rk3588s evb dp phy info
rk3588-evb1: dp0-->usbdp_phy0-->Typec-C
             dp1-->usbdp_phy1-->VGA:
               dp lane0-->phy lane2
               dp lane1-->phy lane3
rk3588-evb2: dp0-->usbdp_phy0-->DP:
               dp lane0-->phy lane2
               dp lane1-->phy lane3
             dp1-->usbdp_phy1-->VGA:
               dp lane0-->phy lane2
               dp lane1-->phy lane3
rk3588-evb3: dp0-->usbdp_phy0-->Typec-C
             dp1-->usbdp_phy1-->DP:
               dp lane0-->phy lane2
               dp lane1-->phy lane3
rk3588-evb4: dp0-->usbdp_phy0-->Typec-C
rk3588s-evb1: dp0-->usbdp_phy0-->Typec-C
rk3588s-evb2: dp0-->usbdp_phy0-->DP:
                dp lane0-->phy lane0
                dp lane1-->phy lane1
                dp lane2-->phy lane2
                dp lane3-->phy lane3
rk3588s-evb3: dp0-->usbdp_phy0-->Typec-C
rk3588s-evb4: dp0-->usbdp_phy0-->Typec-C

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I765f7920815e2a61f3bf8f60aca1cd0c8b234305
2021-11-16 18:50:33 +08:00
Zhang Yubing
b2b6e534ca arm64: dts: rockchip: rk3588: Add usbdp_phy0/1 into aliases node
rk3588 has 2 usbdp phy, usbdp phy use aliased id to identify
the 2 usbdp phy devices.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I59c634eb2c74ac48bbf067883c6ed12fd0e3e5eb
2021-11-16 18:50:33 +08:00
Andy Yan
cc89b4a276 drm/rockchip: vop2: Check fb->modifier in Cluster two win mode
Cluster two windows must use same data laylout.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I189bb88b055b4eaabb817ef2cd3ac2054a284cb6
2021-11-16 18:47:50 +08:00
Caesar Wang
a6ca525f8e arm64/configs: rockchip_linux_defconfig: enable wifi configure
+CONFIG_WL_ROCKCHIP=y
+CONFIG_WIFI_BUILD_MODULE=y
+CONFIG_AP6XXX=m
+CONFIG_BCMDHD_PCIE=y
-# CONFIG_NET_VENDOR_REALTEK is not set
+CONFIG_R8168=y

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Icb986d4e419054beb5bb271f37f965e9120348ce
2021-11-16 18:26:43 +08:00
Kever Yang
55f515881d arm64: dts: rockchip: rk3588: Use apb for pcie controller name
The apb address is better identified than dbi address for pcie
controller.

Before patch:
[    4.302098][  T127] rk-pcie a40800000.pcie: PCIe Linking... LTSSM is 0x3
[    4.302141][  T123] rk-pcie a40c00000.pcie: PCIe Linking... LTSSM is 0x3
[    4.302167][  T124] rk-pcie a41000000.pcie: PCIe Linking... LTSSM is 0x3
[    4.328750][  T125] rk-pcie a40000000.pcie: PCIe Linking... LTSSM is 0x3
[    4.328767][  T126] rk-pcie a40400000.pcie: PCIe Linking... LTSSM is 0x2
After patch:
[    4.301712][  T123] rk-pcie fe180000.pcie: PCIe Linking... LTSSM is 0x3
[    4.301727][  T125] rk-pcie fe150000.pcie: PCIe Linking... LTSSM is 0x3
[    4.301779][  T127] rk-pcie fe170000.pcie: PCIe Linking... LTSSM is 0x3
[    4.301799][  T124] rk-pcie fe190000.pcie: PCIe Linking... LTSSM is 0x3
[    4.328473][  T126] rk-pcie fe160000.pcie: PCIe Linking... LTSSM is 0x2

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: Idabe2da42dd3f9bd1ff55d18c490d95fa48795fd
2021-11-16 18:05:54 +08:00
Kever Yang
9892e3a80c arm64: dts: rockchip: rk3588: Fix the pcie1ln setting
pcie1l0_sel pcie1l0->combPHY1
pcie1l1_sel pcie1l1->combPHY2

Fixes: a44f986d11 ("arm64: dts: rockchip: rk3588: Add pcie1ln setting for comboPHY")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I604fec8563c7a82279eaa5e943af1ae69639f862
2021-11-16 18:03:20 +08:00
Cai YiWei
6d3eff78e5 media: rockchip: isp: fix isp30 fbc config
Change-Id: I8e3ec6bbd46c77c95085c36740a35776b69f81fc
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2021-11-16 17:10:12 +08:00
Shunhua Lan
3e819876dd arm64: dts: rockchip: rk3588 board: modify configs for sound cards and headset
1. set hp-det pin pcfg_pull_none all evbs
2. enable headset for rk3588s-tablets
3. add "everest,es8323" string to es8388 compatible property for rk3588s-tablets

Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I85ae0bc78c2058d38ed768da7233d86cdb0c301f
2021-11-16 17:09:20 +08:00
Mark Huang
7a058412d9 arm64: dts: rockchip: add rk3588 nvr demo spi nand Board
Signed-off-by: Mark Huang <huangjc@rock-chips.com>
Change-Id: I435b856239605ea9845e9f1782c0193ddab84836
2021-11-16 17:01:15 +08:00
Jianqun Xu
cc6a4c9133 arm64: dts: rockchip: rk3588s-pinctrl define hdmi pins one by one
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I747f3c5fb7316514458c24384a14997287bc106e
2021-11-16 16:58:45 +08:00
Wang Jie
c7edd31125 arm64: dts: rockchip: rk3588-evb3: enable sensor(mpu6500)
Change-Id: I2dab72855f2f31ac021611397bbed2548c20f9f1
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2021-11-16 16:53:00 +08:00
Wang Jie
aec3ade8ca input: sensor: add new layout 9
In order to adapt to the mpu6500 in the rk3588
evb3 board, a new layout was added.

Change-Id: I9283e05e7b8b3ec04ee887e36898c4c49e4efa51
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
2021-11-16 16:52:39 +08:00
Kyle Tso
2b5787ea0b UPSTREAM: usb: typec: tcpm: Raise vdm_sm_running flag only when VDM SM is running
If the port is going to send Discover_Identity Message, vdm_sm_running
flag was intentionally set before entering Ready States in order to
avoid the conflict because the port and the port partner might start
AMS at almost the same time after entering Ready States.

However, the original design has a problem. When the port is doing
DR_SWAP from Device to Host, it raises the flag. Later in the
tcpm_send_discover_work, the flag blocks the procedure of sending the
Discover_Identity and it might never be cleared until disconnection.

Since there exists another flag send_discover representing that the port
is going to send Discover_Identity or not, it is enough to use that flag
to prevent the conflict. Also change the timing of the set/clear of
vdm_sm_running to indicate whether the VDM SM is actually running or
not.

Change-Id: Id282f7b694cb608a5632db43dafd82dade77340f
Fixes: c34e85fa69 ("usb: typec: tcpm: Send DISCOVER_IDENTITY from dedicated work")
Cc: stable <stable@vger.kernel.org>
Cc: Badhri Jagan Sridharan <badhri@google.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Kyle Tso <kyletso@google.com>
Link: https://lore.kernel.org/r/20210826124201.1562502-1-kyletso@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit ef52b4a9fc)
2021-11-16 16:43:16 +08:00
Hans de Goede
2d408a1113 UPSTREAM: usb: typec: tcpm: Fix VDMs sometimes not being forwarded to alt-mode drivers
Commit a20dcf53ea ("usb: typec: tcpm: Respond Not_Supported if no
snk_vdo"), stops tcpm_pd_data_request() calling tcpm_handle_vdm_request()
when port->nr_snk_vdo is not set. But the VDM might be intended for an
altmode-driver, in which case nr_snk_vdo does not matter.

This change breaks the forwarding of connector hotplug (HPD) events
for displayport altmode on devices which don't set nr_snk_vdo.

tcpm_pd_data_request() is the only caller of tcpm_handle_vdm_request(),
so we can move the nr_snk_vdo check to inside it, at which point we
have already looked up the altmode device so we can check for this too.

Doing this check here also ensures that vdm_state gets set to
VDM_STATE_DONE if it was VDM_STATE_BUSY, even if we end up with
responding with PD_MSG_CTRL_NOT_SUPP later.

Note that tcpm_handle_vdm_request() was already sending
PD_MSG_CTRL_NOT_SUPP in some circumstances, after moving the nr_snk_vdo
check the same error-path is now taken when that check fails. So that
we have only one error-path for this and not two. Replace the
tcpm_queue_message(PD_MSG_CTRL_NOT_SUPP) used by the existing error-path
with the more robust tcpm_pd_handle_msg() from the (now removed) second
error-path.

Change-Id: I5ccff5715cf08e2f8ba825eae4fc7cbdf43f1970
Fixes: a20dcf53ea ("usb: typec: tcpm: Respond Not_Supported if no snk_vdo")
Cc: stable <stable@vger.kernel.org>
Cc: Kyle Tso <kyletso@google.com>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Kyle Tso <kyletso@google.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20210816154632.381968-1-hdegoede@redhat.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 5571ea3117)
2021-11-16 16:42:52 +08:00
Kever Yang
5c15a7a446 arm64: dts: rockchip: rk3588: add pipe-grf for pcie30phy
pcie30phy will need to reference to pipe-grf.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I31e55c33c22fa4a2bcf424ad4730e057a6fbca28
2021-11-16 16:40:20 +08:00
Kever Yang
39e58a61a5 phy: phy-rockchip-snps-pcie3: Add pcie3_phymode setting
rk3588 pcie3 phy has a pcie3_phymode to decide how to use the four
lanes, add support in dts so that we can customize in dts.

The phy has two port and each port has two lane:
pcie30_phy_mode[2:0]
2: aggregation
1: bifurcation for port 1
0: bifurcation for port 0

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I0546329cc53df05f0779a7b34d948158bbc5ebcd
2021-11-16 16:23:36 +08:00
Shawn Lin
2ec9a85e36 phy: phy-rockchip-snps-pcie3: support RK3588
Add support for RK3588 PCIe3.0 phy, and make it more
flexible for later platforms.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ied29cfcdf69d84ab2a6d653259170b9d2c484a06
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-11-16 16:16:43 +08:00