The px30 use the same phy configuration as rk3328,
however, in fact, they need different phy tuning
parameter, especially the ID Detector pin, px30
support the iddig status detection, but rk3328 not
support. Therefore, this patch adds independent
configuration for px30.
Fixes: 22d153d2eb ("phy: rockchip-inno-usb2: fix USB OTG not working in HOST mode for RK3328")
Change-Id: I8d6d581f3e0b91d7fa06d9c569579cdf6ba8d4bb
Signed-off-by: William Wu <william.wu@rock-chips.com>
1. Cluster can't support xmirror/rotate90/rotate270 when it isn't fbc
format.
2. Cluster can't support xmirror/ymirror/rotate90/rotate270 when it is
tiled format.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I191c090d69177f13b0352a0df452fc050f66a74c
when two single DSI work simultaneously without defining
the backlight, there will be a naming conflict as follows:
sysfs: cannot create duplicate filename '/class/backlight/dcs-backlight'
Change-Id: I25c9da720595322cd8136b715efc7822bd7e04e9
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Add a software PWM which toggles a GPIO from a high-resolution timer.
This will naturally not be as accurate or as efficient as a hardware
PWM, but it is useful in some cases. I have for example used it for
evaluating LED brightness handling (via leds-pwm) on a board where the
LED was just hooked up to a GPIO, and for a simple verification of the
timer frequency on another platform.
Since high-resolution timers are used, sleeping gpio chips are not
supported and are rejected in the probe function.
Change-Id: Idbd041a5ab40530886192a913a092643646896ad
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Co-developed-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
(cherry picked from https://patchwork.ozlabs.org/project/linux-gpio/patch/20240204220851.4783-3-wahrenst@gmx.net/)
There is no need to call .resume() in switching between
uboot logo and kernel logo.
Fixes: 037df56ef7 ("drm/rockchip: vop2: Add support to request early supend")
Change-Id: I3da95e20726893412386cd414f9a4fd38724d0f0
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
When bitstream buffer not enough and trigger bitstream overflow, driver
will update r/w addr for enc continue.
The patch is adapter for rk3588 and other chips using rkvenc2.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: If778f79ef6113883c8669873f4e3e3fccb93c402
For rk3576 and rk3588, vop dclk can be from pll or hdmi phy[except hdmi
2.1(dclk bigger than 597M), the HDMI work at FRL mode], when dclk is
from pll, dclk_parent is equal to dclk, we need clk_round_rate() for dclk_parent to
check whether can support this mode.
1. GPLL/CPLL/VPLL
dclk_parent
dclk
2. xin24m
clk_hdmiphy_pixel0
dclk
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I4541d41c3fda5b8ff989e19e8dbf686b15e81216
when pm_domains set alway_on, pm_rutime_resume may accuss
before rkvdec2_probe. thus, dec->fix is null, and it will
not trigger rk3576_workaround_run.
Change-Id: Ie6cd865a0075ed775fbe127447b7e679048ef4ce
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
when system enter suspend, aaos will set output S35390A_CMD_TIME1 mode,
and status register 32K will clear, so need set register again.
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Change-Id: I0efe1ad9c2ed5fc48007309f3ac3f3d714823c88
RK3576 USB OTG1 device depends on the pipe phystatus
which from the combphy by default. If the combphy usb
mode is disabled, it needs to set the pipe phystatus
to 0 via PHY_GRF_USB3OTG1_CON1[3:2].
Change-Id: I56aadc9d33c5433a1d4d3b6a890d186992f9ab39
Signed-off-by: William Wu <william.wu@rock-chips.com>
Remove unneeded address/size cells properties and unit
addresses to fix DTC warnings on RK3576 boards like:
arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dtb:
Warning (unit_address_vs_reg): /i2c@2ac50000/husb311@4e/ports/port@0/endpoint@0: node has a unit name, but no reg or ranges property
Warning (graph_child_address): /usb@23000000/port: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary
Warning (graph_child_address): /i2c@2ac50000/husb311@4e/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Change-Id: I5cc8e9f7da6816c9b70daf40bc6b036e24af9eff
Signed-off-by: William Wu <william.wu@rock-chips.com>
HDMI has compatibility problems when the HDMI PHY VDD is set to
the nominal 0.75V. On some televisions, signal may be no recognized
when switch resolution. After actual testing, raising voltage up
to 0.8375V can solve the compatibility problems such as no signal.
Change-Id: I633f0321e83ac2a6325e4ca1de60c4b22c9a9961
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Only some specific win support the color key feature. So for those win
that don't support it, don't expose the color key prop to the user.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Change-Id: I75f0ca8c40a3bfa8e45b8a06bdb9576643296386
The sii902x hardware initialization process is during
the probing, including gpio reset and some register
operations. Because of the above, display will be
affected during the switching between uboot logo and
kernel logo.
The modifications are as follows:
1.Add sii902x_is_enabled() to check whether hardware
initialization has been done in uboot.
2.Add loader_protect flag to make sure whether hardwave
initializaiont needs to be done, and the .mode_set()
will not be called if logo enabled, which may cause
display error.
3.Set gpiod_flags of enable/reset gpios to GPIOD_ASIS,
and replace gpiod_set_value() with gpiod_direction_output(),
in order to make gpios status unchanged from uboot
to kernel.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I430402c2089602c9690fee03ff2ae9f9b2d3a419
Set RK_TAP_VALUE_SEL flag to disabled dll auto update feature.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id28b1800b8a4728c9919a75669b3f7e35ead18fd
The urgency signal can improve the performance of VOP accessing DDR, since VP0
support 4K120hz output, it usually needs high performance and bandwidth, so it's
enabled at RK3576 VP0.
RK3576 VP0 has 8 lines post linebuffer, when full post line buffer is less 4,
the urgency signal will be set to 1, when full post line buffer is over 6, the
urgency signal will be set to 0.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If96a3bda6728b1faa36d03f0ae6f71b6a60558a3
We can get the vp max dclk rate from vop reg data, so the function
rockchip_drm_get_dclk_by_width() is unused now.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I88ccb372cdd75db008bcf5ec7913924d046240b8
get vp max dclk rate from vop reg data is more correct, so we use it to
verify vp performance and report to userspace.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I1e590322829e551814ba84bf22d60a4e82b407d1
The vopl is in RK3576_PD_VPU, but the 1to4 module is in
RK3576_PD_VO0.
Change-Id: Ided487b8a53f405a0172800fc1d3e1b4ab0283d6
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
