shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 03:40:35 +09:00
Code Issues Packages Projects Releases Wiki Activity
1,064,850 Commits 55 Branches 2,486 Tags
5f2e518f7cfbf770fcbad899877a2b058959bb77
Commit Graph

1064850 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Huibin Hong
5f2e518f7c arm64: dts: rockchip: rk3588-linux: disable gic nmi 
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: Ie43042ce19586c5b37e0864ff9ccef87f20fd68d
 2022-01-20 14:20:59 +08:00
Dingxian Wen
3e6fe49ea6 arm64: dts: rockchip: rk3588-evb1-lp4: enable hdmirx_ctrler 
Enable hdmirx_ctrler and reserve cma memory for hdmi-in application

Change-Id: I033bcea55e03e168a73fb607c17d92468b6f2c34
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2022-01-20 10:56:08 +08:00
Dingxian Wen
f2639a412c arm64: dts: rockchip: rk3588: Remove hdmirx_reserved 
hdmirx can use the default CMA memory.

Fixes: d14994e799 ("arm64: dts: rockchip: rk3588: add hdmirx_ctrler node")
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I6b019fd278374e5edc9e46db63b50e4658578178
 2022-01-20 10:55:57 +08:00
Dingxian Wen
c377384268 media: platform: hdmirx: hdmirx can use specific reserved CMA memory or 
default CMA memory

Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I6a913c496d2098b62a7cafbd9932d87804474d9f
 2022-01-19 18:04:14 +08:00
Jianqun Xu
e8f7a297a7 Revert "video: rockchip: mpp: use dma-buf-cache func" 
This reverts commit 5a9e481dce.

Change-Id: I56e60eeec934c240464c5e2677bb1fb635410528
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2022-01-19 18:03:45 +08:00
Caesar Wang
e34225faf5 Revert "arm64: dts: rockchip: enabled dmc on rk3588 linux evb1" 
This reverts commit f48350e234.

Conflicts:
	arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-linux.dts

Change-Id: I334d4892fb3ef51f5cbe66b80a6d4bbf1938310d
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
 2022-01-19 18:02:02 +08:00
Jianqun Xu
2da4d0ad4c dma-buf: remove size align to cache line size check for partial sync 
Fixes: 1aef8d5550 ("dma-buf: add DMA_BUF_IOCTL_SYNC_PARTIAL support")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I89a0a98be33235ce707f660a95098511bbdf830a
 2022-01-19 18:01:33 +08:00
吴良清
de8062f2c3 Revert "arm64: dts: rockchip: rk3588-android: enabled dmc" 
This reverts commit 2e274f3186.

Change-Id: Ieefcf657118a95ad44344e8bca1bcc4403d1665d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
 2022-01-19 17:15:45 +08:00
Dingxian Wen
b1ba0df9c0 arm64: dts: rockchip: rk3588: configure hdmirx_reserved as reusable 
To fix memory reservation error.

Fixes: d14994e799 ("arm64: dts: rockchip: rk3588: add hdmirx_ctrler node")
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I340a5efefeaba2985d9bb811e20a76b90e0b7888
 2022-01-19 16:08:56 +08:00
Yao Xiao
a2538eae57 arm64: dts: rockchip: rk3588-evb1-lp4-v10-linux: keep wifibt power in suspend 
Signed-off-by: Yao Xiao <xiaoyao@rock-chips.com>
Change-Id: I360ac3b6765fc4dfba139fce6856ef1eab16fd72
 2022-01-19 14:30:46 +08:00
Weiwen Chen
08462a9ef6 arm64: dts: rockchip: Add rk3588-evb1-lp4-v10-linux-ipc.dts 
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Iafd5bef2acb8388dcd58fcbcb86748cafecf9737
 2022-01-19 14:29:59 +08:00
Wyon bi
f444da677c drm/rockchip: dw-dp: Add extcon support 
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I7310fb33f46ed555bdf4c4f5601356696e68f34d
 2022-01-19 08:41:15 +08:00
Dingxian Wen
d14994e799 arm64: dts: rockchip: rk3588: add hdmirx_ctrler node 
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I6d86ff13e58611e068fd3a6cc44d1f9b6f6457da
 2022-01-18 20:05:20 +08:00
Dingxian Wen
1998c1af0a media: platform: add rockchip hdmirx phy and controller driver 
Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I9344f8e2221d714f0c6d90c6e1f51c60024ffefc
 2022-01-18 16:11:16 +08:00
Dingxian Wen
ee8940ee60 arm64: rockchip_defconfig: enable CONFIG_VIDEO_ROCKCHIP_HDMIRX 
Enable CONFIG_VIDEO_ROCKCHIP_HDMIRX for hdmi-in application on
rk3588-evb1-lp4

Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
Change-Id: I947bc91362704b443feb5fdbc9905cd2d2a2a0ef
 2022-01-18 15:48:33 +08:00
Caesar Wang
f48350e234 arm64: dts: rockchip: enabled dmc on rk3588 linux evb1 
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Icdc38d87c9ac3fe3e14caf77beaaa840909066ef
 2022-01-18 14:40:26 +08:00
Alex Wang
f7486beac7 arm64: dts: rockchip: rk3588-nvr: Assign VOP_ACLK to 800MHZ for 8K 
Change-Id: Ide4640955e4bdab9273df81d25aa4d361a9fa487
Signed-off-by: Alex Wang <alex.wang@rock-chips.com>
 2022-01-18 11:31:34 +08:00
Cai YiWei
c5d497a33c media: rockchip: isp: fix config for isp_params_v3x 
Change-Id: Ia4d53a646074a146e26e4a09c064e8e64e593de3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-01-18 09:55:16 +08:00
Wang Panzhenzhuan
eb133f088f media: i2c: ov50c40: correct bayer pattern to match register setting 
ov50c40's register settings all set mirror bit 1,
but current bayer pattern is corresponding to no mirror,
so fix it.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I9145955a20e82b1985ed7e84f8f51de3697b0b96
 2022-01-17 20:53:11 +08:00
Tao Huang
61e3b7cd73 arm64: dts: rockchip: Temporarily disable cpu-sleep idle state for rk3588 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I0c18789cc9a8a3899d10f3321d74719fb13b26c0
 2022-01-17 19:14:59 +08:00
shengfei Xu
5c8a2b4623 arm64: dts: rockchip: rk3588-rk806: add power off pinctrl 
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I4eba74ab7aac2b8f26fdeadf105d392c91315330
 2022-01-17 10:12:16 +00:00
Wyon bi
6b9c58b880 Revert "drm/bridge: analogix_dp: Don't handle adjust request if clock recovery is already ok" 
This reverts commit 5639c343b0.

Change-Id: Ib9391e3ae7ef1d22219c9b559789757416be81eb
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
 2022-01-17 17:48:41 +08:00
Wyon bi
5d2c0e06ed drm/bridge: analogix_dp: Set link power state 
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I4f651cb18231c87a1d5848d16308876e49d13b4f
 2022-01-17 17:48:41 +08:00
Wyon bi
71ddde314e drm/bridge: analogix_dp: Use link train delay helper 
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I1c75e259f8787f5029a1b8d1ba48035d2f645a39
 2022-01-17 17:48:41 +08:00
shengfei Xu
f5eb395e3f arm64: dts: rockchip: rk3588s-rk806: add dual-rk806 dtsi for rk3588s 
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ieef7a3c47d6d23c3ceca8307047bc2664388a80c
 2022-01-17 16:59:54 +08:00
Finley Xiao
4e7484d451 cpufreq: rockchip: Add support to set intermediate rate 
When increase voltage the cpu frequency is increased at the same time,
but the read margin has not been reduced.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I97097a5114abad193b7a29aeada390d0323b10ba
 2022-01-17 16:59:14 +08:00
Finley Xiao
e87424342d cpufreq: rockchip: Add support to change read margin for dsu 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I6bb6bcdf2ac169deb668e004d823b9dc1fdc4033
 2022-01-17 16:59:14 +08:00
Shunhua Lan
83654bf74e arm64: dts: rockchip: rk3588s-tablet-rk806-single: add AW87XXXs as aux-devs for es8388 sound card 
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ib9973ab1545b5a3291f408e087f7a886351adec0
 2022-01-17 16:45:12 +08:00
Wu Liangqing
2e274f3186 arm64: dts: rockchip: rk3588-android: enabled dmc 
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: Ie461472afb954af6ba40b3783c208ca7312fb19d
 2022-01-17 16:43:08 +08:00
Wyon bi
8ada7bbee8 drm/rockchip: dw-dp: Fix possible unbalanced phy on/off 
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: Ie71eb9a1c87730f5bb1f76d69fab6ee3d68fcec9
 2022-01-17 15:53:15 +08:00
Shunhua Lan
e9a70c503e ASoC: codecs: add aw87xxx amp 
Change-Id: Ieb1f7af778a6cc4966efd0878d363a4a1f3a9d54
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
 2022-01-17 14:58:57 +08:00
Wyon bi
b31df11baa drm/rockchip: dw-dp: force runtime PM suspend on system suspend 
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I6a5eee91ea92923b29e8a1950f09d4f5f9f93c8f
 2022-01-17 14:51:29 +08:00
Zhang Yubing
3aa6ab2a5d drm/rockchip: vop2: dp and hdmi omit mode fixup 
Dp and hdmi need setting precise clock, if the clock source can't
generator the precise clock for a display mode, the display mode
will be filter in mode valid previous.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I9ec86296a8332368d9f851640c7e8d067a0d96c3
 2022-01-17 14:47:09 +08:00
Ding Wei
0fa7f27673 arm64: dts: rockchip: rk3588: add rockchip,skip-pmu-idle-request for video codec 
Change-Id: I727a581731400080b4ebf334bbdeddcb8640e263
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2022-01-17 14:17:34 +08:00
Ding Wei
1bb163a911 video: rockchip: mpp: Wrap rockchip_pmu_idle_request with skip flag 
Add skip flag to control whether do it.

Change-Id: I9e373d1261b688313d2a3bd7aad0e847405b7fbe
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
 2022-01-17 11:46:14 +08:00
Zhang Yubing
ccff376b8b drm/rockchip: dw-dp: set the default bpc and color format 
when get edid failed or the edid not set the bpc and color format,
we need set a default value.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: Icf8a7104c8d16e38f276dc74ac4df20108adf6fb
 2022-01-17 11:37:00 +08:00
Shunhua Lan
0f3345f410 ASoC: rockchip: hdmi: support dts specified daifmt 
In hdmirx audio the cpu dai may act as slave
And there also will be multi dai cells to select

Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I9b68a064204bb443b7e1e6fdc6e7f9e23b70e902
 2022-01-17 11:35:59 +08:00
Yiqing Zeng
7460cd90aa arm64: dts: rockchip: support imx415 for rk3588 evb3 
Signed-off-by: Yiqing Zeng <zack.zeng@rock-chips.com>
Change-Id: I478b5d71e22a3ccf62269b8a5f7dea0d64e4721e
 2022-01-17 11:26:23 +08:00
Andy Yan
f71b1f1b70 drm/rockchip: vop2: Reset axi clk in vop2_initial 
We notice a pd0 off timeout at system resume.
This because we set pd_off_imd before vop suspend.
but this will case VOP POWER_CTRL regisert record some
wrong state, and will lead a POWER_CTRL register value
change unexpectedly.

So we reset axi clk to clear this state at vop2_inital
to avoid the wrong register state.

[35.874922] [drm:vop2_crtc_atomic_enable] Update mode to 1080x1920p60, type: 16 for vp3 dclk: 132000000
[35.875412] [drm:vop2_crtc_atomic_enable] dclk_out3 div: 0 dclk_core3 div: 0
[35.875424] [drm:vop2_crtc_atomic_enable] set dclk_vop3 to 33000000, get 33000000
[35.885838] <<GTP-INF>>[gt1x_request_event_handler:1093] Request Reset.
[35.885866] <<GTP-INF>>[gt1x_reset_guitar:784] GTP RESET!
[36.073639] [drm:dw_mipi_dsi2_encoder_enable] final DSI-Link bandwidth: 880 x 4 Mbps
[36.141834] [drm:vop2_wait_power_domain_off] *ERROR* wait pd0 off timeout

Fixes: 8684b9914503("drm/rockchip: vop2: power off all vop pd when enter
suspend mode")

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I974573163e35e10dc0748aadc4966219465ed603
 2022-01-17 10:26:50 +08:00
Algea Cao
48fe186846 drm/rockchip: dw_hdmi: Fix other platforms using RK3588 unique resources 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I96b59ac25697e4c1b91ce3eb5109dcb52a639346
 2022-01-15 20:09:33 +08:00
Yu Qiaowei
90f39c9ead video: rockchip: rga3: Update driver version to 1.2.0 
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I5c35fe4bc6f2e26a4d1a5f897776f93033666ea4
 2022-01-15 20:08:51 +08:00
shengfei Xu
50888fb2e7 regulator: rk806: use dvs mode instead of sleep mode 
the rk806 sleep mode may cause the system to shut down unexpectedly.

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I5e2b7ebe277d7e8ec417feac88be5c167657d833
 2022-01-15 20:08:31 +08:00
Algea Cao
3971a18c05 drm/rockchip: vop2: when rect width is between 4096 and 7680, play HDR video must be centered 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: If75d3832cb2e24d9e16e2a0ea69046b57190a227
 2022-01-15 20:00:54 +08:00
Andy Yan
4768cf6818 arm64: dts: rockchip: rk3588: Add reference for dclk source 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I9289002641a2ac95cfdafd570a5b65f79c4d757a
 2022-01-15 19:59:57 +08:00
Andy Yan
f2b2283cd0 drm/rockchip: vop2: Support set dclk parent 
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Iaeab80e58a9dd89efb1e5482a2edee65885fd1df
 2022-01-15 19:53:03 +08:00
Algea Cao
af7b773991 drm/rockchip: dw_hdmi: Set hdmi output same color format in HDR and non-HDR modes 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8209f1536b6bbd385ee629c7cd62d55183c3c0b6
 2022-01-15 19:48:17 +08:00
Algea Cao
c2af125780 drm/rockchip: dw_hdmi: set rk3588 hdmi grf reg after phy power on 
RK3588 dclk is required to access hdmi grf register.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ia7a2f2ab18d8734696b9493340f206aad0168d4c
 2022-01-15 19:48:17 +08:00
Algea Cao
f0a1dc86f2 phy: rockchip-samsung-hdptx-hdmi: Support hdmi phy pll as dclk source 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I14069df19eb35aae6ab5d1a005555d53b31dae8c
 2022-01-15 19:45:49 +08:00
Algea Cao
316631f87d arm64: dts: rockchip: rk3588: Support hdmi phy pll as dclk source 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I33ee7bff8a7e2994bf963b2c747e348a30e61237
 2022-01-15 19:45:49 +08:00
Damon Ding
f8882d308d drm/rockchip: vop2: fix the core_dclk_div_sel setting 
When the display interface is BT656. the register of
core_dclk_div_sel should always be set 1. Not only 'i'
modes like 480i and 576i, but also 'p' modes like 720p,
both need this setting.

As for BT1120 and other interfaces, this bit should be
1 when display mode belongs to 'i', and 0 when display
mode belongs to 'p'.

Only RK3568 has the core_dclk_div_sel control bit, which
has been removed on RK3588.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: If67614bc5068024d602c6acbbe9676d6245fdf1a
 2022-01-15 19:29:27 +08:00