Commit Graph

1272463 Commits

Author SHA1 Message Date
XiaoTan Luo
d795377d62 ASoC: rk817: Add Volume Mixer Controls for Codec
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I222b950bf8a1a7599adba3d9e8c41797bffddbf0
2024-08-16 19:06:23 +08:00
Shawn Lin
def9222ace Revert "PCI: rockchip: dw: remove .link_up() hook from struct dw_pcie_ops"
Revert this commit as it wasn't reliably work as expected by massive test.
The problem is clear now that cxpl_debug_info from DWC core is missing
rdlh_link_up. So reading PCIE_PORT_DEBUG1 and check smlh_link_up isn't enough.

Quoted from DWC databook, section 8.2.3 AXI Bridge Initialization, Clocking and Reset:

"In RC Mode, your AXI application must not generate any MEM or I/O
requests, until the host software has enabled the Memory Space Enable
(MSE), and IO Space Enable (ISE) bits respectively. Your RC application
should not generate CFG requests until it has confirmed that the link is
up by sampling the smlh_link_up and rdlh_link_up outputs."

The problem was introduced by commit 1 and fixed by commit 2 but not to
the end. And finally commit 3 rename the register but not fix anything.

It was broken from the first time. Any dwc controller should be use the
buggy default method to check link up state. So revert this commit to use
our own link_up hook. The timing is drving smlh_link_up->L0->rdlh_link_up->
FC init(a fixed delay) from IC simulation. So the origin code is working. What
we were trying to fix is the link suddenly broke after link was already up.
However, it could happen anytime, even just after passing dw_pcie_link_up
check. So it's function drivers responsibility to check 0xffffffff return value
to be aware of the link broken state and do a proper retry or recovery.

[1]. commit dac29e6c54 ("PCI: designware: Add default link up check if
sub-driver doesn't override")

[2]. commit 01c076732e ("PCI: designware: Check LTSSM training bit
before deciding link is up")

[3]. commit 60ef4b072b ("PCI: dwc: imx6: Share PHY debug register
definitions")

This reverts commit a095b98601.

Change-Id: I2104e5fe00ac3be921f6dc1185ad3ce34e01d1bc
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2024-08-16 18:27:17 +08:00
Finley Xiao
fce9853080 clk: rockchip: rk3506: Make pclk ioc critical
Change-Id: I344aae5386ff6d18ea3e8a99e9cf42da27e32a1f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2024-08-16 17:53:14 +08:00
Luo Wei
06a2bad16e arm64: dts: rockchip: rk3588-vehicle-evb: init v23 dts files
Signed-off-by: Luo Wei <lw@rock-chips.com>
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com>
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Zheng zhiqi <looper.zheng@rock-chips.com>
Change-Id: Id704f2ee9a4f1c117cad6ae63f2d71f93c9dcc12
2024-08-16 17:02:35 +08:00
Hisping Lin
565bcc6674 nvmem: rockchip-otp: enable otp access permission lock
Change-Id: I48fe4fc4481a789e055c22c6995de4b45d3dce2c
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
2024-08-16 16:53:09 +08:00
Hisping Lin
73d255eb3b nvmem: rockchip-otp: do not close common clk
When s otp and ns otp are accessed simultaneously,
do not close the common clk to avoid reading failures.

Change-Id: Ic488e2053e99bf3413ba709ad17cf2fc1f95ad0b
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
2024-08-16 16:53:09 +08:00
Jiajian Wu
5c4a65a525 arm64: dts: rockchip: rk3399 boards: hdmi-sound compatible to rockchip,hdmi
Change-Id: I2f459e5f0c1ca45452e257492770626afcf3c5d5
Signed-off-by: Jiajian Wu <jair.wu@rock-chips.com>
2024-08-16 16:44:54 +08:00
Jiajian Wu
3b0e65078d arm64: dts: rockchip: rk3568 boards: hdmi-sound compatible to rockchip,hdmi
Change-Id: Ie41fe598c271175000426f82d671a3b01aab4e1b
Signed-off-by: Jiajian Wu <jair.wu@rock-chips.com>
2024-08-16 16:44:43 +08:00
Cai YiWei
7976d8fed9 media: rockchip: isp: isp39 aiisp offline mode default
Change-Id: I6e3b3809089d331b371cab3e3d879a68a8abf7e7
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2024-08-15 19:43:22 +08:00
Cai YiWei
e849bbadbe media: rockchip: isp: clear isp force update bit
Change-Id: I6dd6b348638f24e8e441b3a0501a3b92e9fa70d5
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2024-08-15 19:43:22 +08:00
Algea Cao
5f25916775 drm/bridge: synopsys: dw-hdmi-qp: Avoid enable hdcp when hdmi is disabled
If enable hdcp when hdmi is disabled, system will crash.
Because hdmi regs can't be accessed when hdmi clk is disbaled.

This patch fixes the following panic:

Kernel panic - not syncing: Asynchronous SError Interrupt
CPU: 7 PID: 2053 Comm: modetest Tainted: G           O       6.1.75 #114
Hardware name: Rockchip RK3576 EVB1 V10 Board (DT)
Call trace:
  dump_backtrace+0xf4/0x114
  show_stack+0x18/0x24
  dump_stack_lvl+0x6c/0x90
  dump_stack+0x18/0x3c
  panic+0x14c/0x338
  check_panic_on_warn+0x0/0x90
  arm64_serror_panic+0x68/0x74
  do_serror+0xc4/0xcc
  el1h_64_error_handler+0x34/0x48
  el1h_64_error+0x78/0x7c
  regmap_mmio_read32le+0x10/0x20
  _regmap_bus_reg_read+0x28/0x34
  _regmap_read+0x18c/0x240
  regmap_read+0x54/0x78
  hdmi_readl+0x2c/0x58
  dw_hdcp_qp_hdcp_start+0x10c/0x394
  dw_hdmi_qp_hdcp_enable+0xd0/0x194
  dw_hdmi_connector_atomic_commit+0x9c/0xc4
  rockchip_drm_atomic_helper_commit_tail_rpm+0x220/0x2d8
  commit_tail+0xa4/0x154
  drm_atomic_helper_commit+0x1c4/0x1e4
  drm_atomic_commit+0xa4/0xd0
  drm_mode_obj_set_property_ioctl+0x140/0x474
  drm_ioctl_kernel+0x80/0xf8
  drm_ioctl+0x2d4/0x554
  __arm64_sys_ioctl+0x90/0xc8
  invoke_syscall+0x40/0x104
  el0_svc_common+0xbc/0x168
  do_el0_svc+0x1c/0x28
  el0_svc+0x1c/0x68
  el0t_64_sync_handler+0x68/0xb4
  el0t_64_sync+0x164/0x168

Change-Id: I2ca288bf192f51ab14d1e369fe0a472e84508379
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-15 19:38:20 +08:00
Shawn Lin
f6253df6f9 phy: rockchip: naneng-combphy: Add external clk support for RK3528
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I0e379cef876ed45bf5196e03999f937d1c830943
2024-08-15 19:36:07 +08:00
Jon Lin
3bdb9f70ba phy: rockchip: naneng-combphy: Support rockchip,enable-ssc for RK3528 PCIe
Change-Id: I227d11357e29e086f48324ef5bebc8173058ede7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-15 19:36:07 +08:00
Jon Lin
781ee5d8be dt-bindings: spi: spi-rockchip: Support rockchip,failed-retry-poll
Change-Id: I8ba66e3b3aab180296b5a2d15e50b5edfc220691
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-14 20:23:41 +08:00
Jon Lin
2469e19107 spi: rockchip: Support failed retry poll
SPI transmission exception is often caused by an abnormality in the
IRQ subsystem in the environment, so an attempt is made to switch
to the poll transmission scheme in order to expect the SPI module
to continue working.

Change-Id: I1fc0451efef501a5a462931515a25e48c4fd1765
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-14 20:23:36 +08:00
Jon Lin
5df6dc1dd9 spi: rockchip: Enable pm_runtime autosuspend_delay
This can balance performance and power consumption.

Change-Id: Ib59047632c57b6897098d16f43ba44e38e075c00
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-14 20:23:27 +08:00
XiaoTan Luo
c7b9a0eda0 ASoC: rockchip: multicodecs: Fix probe error on missing key config
Allow ADC-only headset mic detection when input key not needed

Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Icd23a514861f535c488177a7554016c1d70ff118
2024-08-14 18:54:30 +08:00
Frank Wang
649854e053 mailbox: rockchip: adds b2a direction support
Configure the "rockchip,tx-direction-b2a" property in DT can enable
B2A direction support for Rockchip mailbox V2 IP.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I005f2cebb3898ef895fd0be238711b65f3717690
2024-08-14 18:53:54 +08:00
Frank Wang
8bc01b6dba mailbox: rockchip: add more txdone methods support
Configure "rockchip,txdone-irq" property in DT indicates that the
controller can trigger the TX_DONE interrupt. This feature begin
support from RV1103B and RK3506 SoCs with Rockchip mailbox v2 IP.

If the mailbox client wants to use its own ACK to check TX_DONE,
the "rockchip,txdone-ack" property also gets reday for it in
this patch.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ie62d94c13f6d8081b08e8bf5c45b5f7de5204bbe
2024-08-14 18:53:54 +08:00
Yu Qiaowei
c09c257b5d video: rockchip: rga3: fix map/unmap buffers in mutex_lock
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I9570af5ddef114c1cf322d62959589d0c2cc1b24
2024-08-14 18:47:37 +08:00
Yu Qiaowei
310cad87e0 video: rockchip: rga3: add commit work in fence callback
To avoid the caller signaling acquire_fence in some special cases (e.g.
interruptions), use the work queue to execute 'request_commit'.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ibec2c8a7f5b5bd3e99d9109793561f28bfb7d4ac
2024-08-14 18:47:37 +08:00
Algea Cao
ba78086f0b drm/bridge: synopsys: dw-hdmi-qp: Read bstatus via ddc
When hdcp repeater's device count is 0, hdmi controller
will not update bstatus in hdcp1.4 ram. So bstatus should
be read via ddc directly.

Change-Id: I891f3824c0e77586c1180b118d38da4667e4a927
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
5abf2c5f69 drm/rockchip: dw_hdmi: Output max rate if support frl mode and rate in edid is 0
Change-Id: Ibd4d4f16478412a2a3260ac717b0ba53e80e7740
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
d9459b1ea9 drm/rockchip: drv: Support HFR1-17
HFR1-17 requires that when the frl rate in edid
is protocol undefined, hdmitx must output the
maximum supported frl rate.

Change-Id: I61a0152d570e826207f51724578b0113e8818302
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
f1408dc64a drm/rockchip: drv: Support parse edid scds
Change-Id: I0dc7fa3c755819ed48a2c05797405105f1b075d0
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
6fda045b25 drm/rockchip: dw_hdmi: Output yuv420 when sink only support yuv420
Change-Id: I458f1ba66d94eaa5a77722a72f14f688de311d88
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
e7163be259 drm/bridge: synopsys: dw-hdmi-qp: Add flt thread for frl cts
Added flt state machine thread to ensure that frl cts can pass:

1.Support txFFE Level switch.
2.Support LTS4.
3.Polling sink frl status after flt pass.

Change-Id: I0d2aa1e8fb5ae39ff3493daf4f2036dffe0817a2
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-14 17:55:20 +08:00
Algea Cao
e941183620 phy: rockchip-samsung-hdptx-hdmi: Supports different phy at different ffe levels
RK3588 support ffe level from 0 to 3.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8b90b68a5d452815e54223497ae05203c85470bd
2024-08-14 17:55:20 +08:00
Zefa Chen
78a3b3d34a media: rockchip: vicap: rk3588s2 max support 5 mipi
logic node  -> real hw

mipi_dcphy0 -> csi0 01 lane(or 4 lane, no used csi_dphy5)
mipi_dcphy1 -> dcphy1
csi_dphy1   -> csi1 01 lane
csi_dphy2   -> csi1 23 lane
csi_dphy5   -> csi0 23 lane

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I33251ee31e60737c113107d2a47154e69d291760
2024-08-14 17:28:11 +08:00
Zefa Chen
7c4f13c632 media: rockchip: vicap fixes stop logic to avoid timeout
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ibbf7851cca4f8d0b4e2ab9407a173efa6ea92c54
2024-08-14 17:28:11 +08:00
Sugar Zhang
5cf9e075d7 ASoC: rockchip: i2s-tdm: Fix wrong TRCM id
Fixes: 3f4436826e ("ASoC: rockchip: i2s-tdm: Fix 1-Bit offset case")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia2188975b139e8dc751b28758e9a21f3cad6d593
2024-08-14 14:52:46 +08:00
Sugar Zhang
27f1ad5ccc ASoC: rockchip: dlp: Add support for pcm pattern playback
CONFIG_SND_PCM_PATTERN_DEBUG

* MSB check
* channel id
* as much as more 0/1 stress

PATTERN8(x)     (0xa0 | (x))
PATTERN16(x)    (0xab00 | (x))
PATTERN32(x)    (0xabcabc00 | (x))

e.g. 16bit 4ch pattern:

0xab01 0xab02 0xab03 0xab04 0xab01 ...

This pattern is only used for IOCTL_READ/WRITE, not
suitable for MMAP.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I96d9664460adeee13ac86558159b39c9ab0dabe8
2024-08-14 09:09:42 +08:00
Sugar Zhang
0083e5a0ce ALSA: pcm: Add support for pcm pattern playback
CONFIG_SND_PCM_PATTERN_DEBUG

* MSB check
* channel id
* as much as more 0/1 stress

PATTERN8(x)     (0xa0 | (x))
PATTERN16(x)    (0xab00 | (x))
PATTERN32(x)    (0xabcabc00 | (x))

e.g. 16bit 4ch pattern:

0xab01 0xab02 0xab03 0xab04 0xab01 ...

This pattern is only used for IOCTL_READ/WRITE, not
suitable for MMAP.

Change-Id: Ida01d0e30b20d0a14f3b8439eed430af8a3a9d56
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2024-08-14 09:09:02 +08:00
XiaoTan Luo
b050234e13 arm64: dts: rockchip: rk3576 boards: Add pinctrl idle/clk for pdm
This commit adds pinctrl idle/clk configuration for the PDM on RK3576 boards to improve power management and reduce clock glitches during runtime.

commit: 48aa220b8b ("ASoC: rockchip: pdm_v2: Fix clk glitch on runtime PM")

Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I41ad272a19656af325b42e4284296a21f14cafe4
2024-08-13 16:05:54 +08:00
Zain Wang
a44df82a67 ARM: rk3506_defconfig: used zstd compression for squashfs
Change-Id: I78c58c134e0e51065ffacc3b49e4502b5cb55d42
Signed-off-by: Zain Wang <wzz@rock-chips.com>
2024-08-13 16:05:39 +08:00
Vidya Sagar
da7c19384d FROMLIST: PCI/hotplug: Add GPIO PCIe hotplug driver
This adds a standalone driver to support PCIe hotplug functionality
merely based on a GPIO indicating the status of a downstream device
connectivity. It looks for "hotplug-gpios" property in the corresponding
device node to get the GPIO information.

It also provides a mechanism for platform drivers of the controllers
to register ops to perform any platform specific operations while
enabling/disabling the slots.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patchwork.kernel.org/project/linux-pci/patch/20220930192747.21471-3-vidyas@nvidia.com/
Change-Id: Iafa798ee4d98f195f5d33d80120da0c569132548
2024-08-13 15:56:06 +08:00
Vidya Sagar
37921b4b01 FROMLIST: dt-bindings: Add "hotplug-gpios" PCIe property
Provide a way for the firmware to tell the OS about the GPIO that can be
used to get the Hot-Plug and Unplug events.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patchwork.kernel.org/project/linux-pci/patch/20220930192747.21471-2-vidyas@nvidia.com/
Change-Id: I2a24689796a5cc6cb9596e92cf47139127098353
2024-08-13 15:55:55 +08:00
David Wu
cd4a1dca2f i3c: master: Add driver for Rockchip IP
Add driver for Rockchip I3C master IP

Change-Id: I73ca38117c0e0e603da23586c7b5c93f80917b2e
Signed-off-by: David Wu <david.wu@rock-chips.com>
2024-08-13 15:17:31 +08:00
Lin Jianhua
3dea18690f ARM: rk3506_defconfig: enable rk801/gslX680/hym8563/stk3332 for rk3506g demo board
before:
   text	   data	    bss	    dec	    hex	filename
4880931	2116804	 107272	7105007	 6c69ef	vmlinux
after:
   text	   data	    bss	    dec	    hex	filename
4922448	2288868	 118408	7329724	 6fd7bc	vmlinux

Change-Id: If066c764f6f17c35041f9f6a12afe255334b4f46
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
2024-08-13 10:38:03 +08:00
Zain Wang
59482a3a75 ARM: dts: rockchip: add rk3506g-demo-display-control.dts
Change-Id: I2b0b5d31694168c37ba122a49ded99da64dbe3dc
Signed-off-by: Zain Wang <wzz@rock-chips.com>
2024-08-13 10:33:06 +08:00
Hongming Zou
17a4e1cf2a input: touchscreen: gslx680_pad support gsl1686
Change-Id: If1ffbb172b63b046496340fd7e90c51dc64d7abf
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>
2024-08-13 10:31:17 +08:00
XiaoTan Luo
54359b56ca arm64: dts: rockchip: rk3576: Add pinctrl idle for pdm
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: Ia1aaf014ae5c393d3e1cc9155c6b7135acc12eb7
2024-08-13 09:31:44 +08:00
Tao Huang
793f93d85a ASoC: rk817: Sync with upstream
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I6162f1b433fd6bef619f6cad8df3b1ac8e734c06
2024-08-13 09:27:52 +08:00
Jon Lin
4c9bb4b7cc arm64: dts: rockchip: rk3576: Define fspi max-dll
Change-Id: I01ab52ee7f0368bb08b86307ffb44561f07331b9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-13 09:27:36 +08:00
Joseph Chen
c98ecc8caa ARM: dts: rockchip: rk3506-evb1: Update rockchip-suspend node
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9fb7eb37e3540aaa1ca3b1ba3e6792ef8655f53f
2024-08-13 09:21:52 +08:00
Joseph Chen
d9e3721dae ARM: dts: rockchip: rk3506: Add rockchip-suspend node
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2ee72633c016d83d8655f4172252bd1c0c41cd14
2024-08-13 09:21:22 +08:00
Joseph Chen
3a23e8876c dt-bindings: suspend: Add rk3506 support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I89e5bb2a806e0848ef97db6535d9b458d145c361
2024-08-13 09:21:11 +08:00
Jon Lin
66f11090f1 ARM: dts: rockchip: rk3506: Define fspi max-dll
Change-Id: I913a406bd3992f24fd437c905bc8b0c304f7befa
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-13 09:16:45 +08:00
Jon Lin
7f0be18516 dt-bindings: spi: rockchip-sfc: Add rockchip,max-dll property
Change-Id: I8b559635082a1a5785cc5075afba5de13cde8d89
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-13 09:11:10 +08:00
Jon Lin
2b1b24b4f0 spi: spi-rockchip-sfc: Support maximum dll cell setting for chips
Change-Id: I9bee5b29db8c1eb657720101f32c8d057328451c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-08-13 09:11:10 +08:00