rk3399-evb-rev3-android-lp4.dts add center-supply, otherwise customer
follow this dts file may leave out it. and cause
rockchip_dmcfreq_probe() fail, then lpddr4 lose scale frequency function
and cannot find /sys/class/devfreq/dmc
Change-Id: I05f36a80fd5f95e29f1083f956a799149e88b1f3
Signed-off-by: CanYang He <hcy@rock-chips.com>
The values of the coefficients are the ones in px30.dtsi,
according to Rocky Hao.
Change-Id: I1843b999a3b93fd5791e556db8733596c75ef8ac
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
This patch handle the force-iram function by devicetree.
Change-Id: I95fe96091c560507a37cd0833cf2507e4d2bc636
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
For now, many users would like to switch to HPOUT or
LINEOUT when the headphone plugged or unplugged, we
need to switch path directly.
Change-Id: I7e81396ac42519b1101a8c8757069ac0d8bc65ea
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
The Lontium LT8912 MIPI-DSI to LVDS and HDMI/MHL bridge features a
single-channel MIPI D-PHY receiver front-end configuration with 4 data
lanes per channel operating at 1.5Gbps per data lane and a maximum
input bandwidth of 6Gbps.
Change-Id: I7733ea5f33094151bb62e62406561cc0025cf900
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Currently the protection #ifdef CONFIG_DEVFREQ_THERMAL cuts the needed
structures devfreq_cooling_ops and devfreq_cooling_device.
The functions which are supposed to provide the empty implementation complain
about unknown structures.
Similar solution is present in include/linux/devfreq.h.
Change-Id: I4ed7161734944799443fd43c56394e62eb3c499f
Reviewed-by: Ørjan Eide <orjan.eide@arm.com>
Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 1cea4e7776)
Here the -ENOTSUPP is not an error if there is no set_sysclk
implement in codec_dai and cpu_dai, we need to return 0 that
it's correct.
Change-Id: I969e3eacba39ac8d6c94ddcc27c60cc110d66156
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Add the 'regulator-always-on' property for vdd_gpu on rk3399-tve1030g/
rk3399-tve1205g/rk3399-mid-818-android
Change-Id: I22938c7041bc56b53983447a00e83144411b4cca
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
We need to clear previous residual configuration for
ADC/DAC digital registers before enable them, otherwise,
the acodec maybe abnormal.
Change-Id: I2eeb6ccf1508cf10d214d97c29273d70d16f3417
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Show a accumulation of wfi time of every suspend sate
since system bootup:
$ cat /sys/kernel/wakeup_reasons/total_suspend_wfi_time
Change-Id: I2856faabe2e883a7120931ed49bc0c4f0776600d
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
To reduce the uart interrupts, which may cause:
serial8250: too much work for irq xx
Change-Id: I89e0d990677e4cffae431e60521b3e16e8381f05
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
config reset registers only for rk817 and rk809.
Change-Id: I761fdc891b24812de43251538b1c2af8b7c92d68
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
The pwm clk parent is GPLL,PWM clk not allowed to change freq,
so the GPLL not allowed change mode and freq when pwm is used.
If have trust is need't rk3288_clk_suspend and rk3288_clk_resume.
Change-Id: I4845fda89d7ae7713e8c0e94747c3f4dfd140c6a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
modify the rk808 max steps for increase voltage of Buck1/2,
equal 25mv.
Change-Id: Ic6c016e99ce67f5773d5f5df0b65fa1de10f557a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
There is still the issue that loud and small on some
EVBs. For mass production consistency, we need to
increase and put more delay in enable DAC steps.
The suggest from vendor, we need to use 50 us instead
of 20 us for the key step 2 and step 4, insert 20 us
in other every steps.
Therefore, the total delay in enable DAC is about:
50 * 2 + 20 * 16 = 420us
It looks okay.
Change-Id: Ibc02930271a8a21bc279ee4323e66852f2d58086
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Sometimes the regulator is shared between several devices, if target rate
and target voltage are equal to initial rate and iniital voltage , the
min_uV and max_uV of regulator will be always equal to zero, other devices
may set a low voltage.
Change-Id: I561971844296ffcada823d741710aba808167e3f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Sometimes the regulator is shared between several devices, if target rate
and target voltage are equal to initial rate and iniital voltage , the
min_uV and max_uV of regulator will be always equal to zero, other devices
may set a low voltage.
Change-Id: Ibf82f335ce0739776286e3733be5415f84bf035b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
If initial rate is greater than opp rate and initial voltage isn't qeual
to opp volatge, the opp voltage may too low for initial rate, so it's
inappropriate to update voltage when initial voltage isn't qeual to
opp volatge.
In order to solve this problem and consider that the regulator is shared
between several devices on some platforms, make the following two changes.
If the driver doesn't support to change frequency, the opp table should
contain an opp whose rate is geater than or equal to initial rate, so that
the voltage is enough for initial rate and the min_uV and max_uV of
regulator aren't equal to zero after update voltage.
If the driver supports to change frequency, let devfreq framework update
rate and voltage.
Change-Id: I4004f55f2cfd3b87f734844a0cdf8e9619d785d2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
pmu_io_domains voltage is 1.8V for rk3399-tve1030g board
Change-Id: Iffba406ca1e88f346fc9e436b7b4ea4878b19e92
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
