If less this commit, esmart port sel will be set error val and lead to
esmart register can't take effect, this will lead to like iommu
pagefault issues.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If2c80a683b81d1ad00bdea9f2c09da90a5f55964
1.Fix the shift of reg grf_mipi_1to4_en to 0.
2.Set grf_mipi_mode to 0(video mode) if using display path
vopl->1to4->mipi.
3.Add configuration of reg out_dresetn, which should be
set to 1 if using display path vopl->1to4->edp/hdmi/mipi.
4.Set reg grf_hdmi_1to4_en to 1 if using display path
vopl->1to4->hdmi.
Change-Id: Ia19725f69382d6b0d2a710c17b9ac1c8a284ddf5
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
The RGB888 bus_format can be converted to VYU444 if r2y
enabled, so it is needed to enable rb_swap and rg_swap
for YUV444.
Change-Id: Ib35398137dcd3c849590ba5243d879c5ef11ccee
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Set timer reference base According to the actual
refclk frequency, otherwise cec or ddc function
may be abnormal.
Change-Id: Id45af649182a5158a47ee2cadb1254f2dc855d52
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Reg mem_clk_auto_gating can help to gate the clock for
accessing HDCP memory automatically.
Change-Id: I04188d59e4273cfb61551cd01ca53f336d2bf1aa
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
For rk3576, vopl supports eDP/HDMI/MIPI by the 1to4
module, which can transfer 1 pixle/cycle data from
vopl to 4 pixle/cycle data for HDMI/MIPI controllers.
Change-Id: I0da688d53c92a93e55778da2cce17596a22f540e
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
SHARP mainly completes the enhancement of image
details, which can support the configuration of
different intensity gains for different scales
and different directions of details.
Only vp0 support SHARP and rgb input is not
supported. SHARP shares line buffer with
post scaler, so the two functions are mutually
exclusive.
Change-Id: Id4887594821640d6685a76a7094bbb57c6d50b21
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
DCI mainly completes the dynamic adjustment of the
brightness and contrast of the picture according to
the brightness distribution of the current picture,
so that the picture appears more transparent.
Only cluster0 supports DCI, suitable for minimum
resolution of 128 x 128 and maximum resolution of
4096 x 2160.
Change-Id: I1836d2d317172859b7df971ce4f4fb5dfb1b4c83
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
RK3576 VOP have 2 Cluster win and 4 Esmart win, this win be used
by 3 video ports as following roles:
* VP0 can use Cluster0/1 and Esmart0/2
* VP1 can use Cluster0/1 and Esmart1/3
* VP2 can use Esmart0/1/2/3
In additions, RK3576 VOP can support DCI/ACM/CSC/HDR/SHARP/GAMMA/3D LUT/POST SCALE/BCSH
etc. post process.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I89f656e847f758f9d3d57ee0c137b29196de6737
This driver is modified to support RK3576 SoCs.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Id933108d90a2850b82779a7328563a3b0812e703
According to a description from TRM, add all the power domains.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia9361658401641acbaec8b4853a07507dcf48404
Add the clock tree definition for the new RK3576 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I85c05295394032485f146efbaf8aee9044685bfa
Add the dt-bindings header for the rk3576, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3576.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I6aff7360d4ff95266134394e66e0987c59906905
Document the device tree bindings of the rockchip Rk3576 SoC
clock driver in
Documentation/devicetree/bindings/clock/rockchip,rk3576-cru.yaml.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I4f80de8accd78e29a3bac0a8ef9c2c9ef946bb94
For soc has less 15 UARTS, bur more than 10, like rk3576
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Change-Id: I3bfdfa7414a080864e8d154dec8e1691c21a9ab0
Because the board of RK3576-iotest uses the i3c peripheral, it
is easy to enable this driver for testing.
Change-Id: I457ff6285d6627d8c11a0bbbda7261c9f5b19432
Signed-off-by: David Wu <david.wu@rock-chips.com>
Merge made by the 'ours' strategy.
* commit '784e52a797a936672fdcb4b5ae32feae5fe47e71':
spi: rockchip-sfc: Support sfc-cs-gpio
spi: rockchip-sfc: Set the max speed depend on the IP version
spi: rockchip-sfc: Using normal memory for dma
Change-Id: I567e7ae9e5e53597a30e162a6662ca80a65735d1
Since the usbdp phy driver parses "maximum-speed" property in
the parent's node not the child, this amends all the related
DT to fix it.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ic727b1de5f8c59e2bb90c9c1c4b524f22663fb59
Allow defer free large memblock to Buddy allocator work on
!CONFIG_ROCKCHIP_THUNDER_BOOT.
Change-Id: I30f851f648b007d1629eed27ba464ad2d7425577
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Allow up to 4 memblocks to be freed deferred.
Fixes: b6cd53a3a2 ("init: defer free large memblock to Buddy allocator when CONFIG_ROCKCHIP_THUNDER_BOOT=y")
Change-Id: Ie85d4802e639a5d11d64a4ab5f4f74647b7081fb
Signed-off-by: Simon Xue <xxm@rock-chips.com>
