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Author SHA1 Message Date
Tao Huang
09bf3f24b1 arm64: rockchip_defconfig: Enable CONFIG_RT_SOFTINT_OPTIMIZATION 
According to gki commit a0e331ecd3 ("ANDROID: GKI: Enable CONFIG_RT_SOFTINT_OPTIMIZATION").

This config helps address audio buffer underrun issues on arm64 targets.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I1d75b165a8f7afc9e53a28f89e1922c0d4deb726
 2021-09-06 18:16:00 +08:00
Liang Chen
dc824982a5 softirq: retrieve wakeup_softirqd() 
We need call wakeup_softirqd() for the softirqs not completed in irq_exit()
when CONFIG_RT_SOFTINT_OPTIMIZATION is not defined.

Fixes: 0578248bed ("ANDROID: softirq: defer softirq processing to ksoftirqd if CPU is busy with RT")
Change-Id: Id71afcd252ddc69d97ec5167845c602f3aaba3ac
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2021-09-06 16:18:59 +08:00
Sugar Zhang
8bce8175e3 UPSTREAM: ASoC: rockchip: i2s: Fix concurrency between tx/rx 
This patch adds lock to fix comcurrency between tx/rx
to fix 'rockchip-i2s ff070000.i2s; fail to clear'

Considering the situation;

       tx stream              rx stream
           |                      |
           |                   disable
         enable                   |
           |                    reset

After this patch:

         lock
           |
       tx stream
           |
         enable
           |
        unlock
       --------               ---------
                                lock
                                  |
                              rx stream
                                  |
                               disable
                                  |
                                reset
                                  |
                               unlock

Change-Id: Idc2f7586772a1051b6926ad1558f401b87f71978
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1630674434-650-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit fcb958ee8e)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
723a615b45 UPSTREAM: ASoC: rockchip: i2s: Add support for frame inversion 
This patch adds support for frame inversion.

Change-Id: I008686fe3084b7805dacede76350a4c6a696e36b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950594-14345-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 917f07719b)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
c2a7461c38 UPSTREAM: ASoC: dt-bindings: rockchip: Add compatible strings for more SoCs 
This patch adds compatible strings for more SoCs.

Change-Id: Ic68c30d38fc086f7c38a2deff2abd88ee4cbc14d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1629950594-14345-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit d5ceed036f)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
f0cde942a2 UPSTREAM: ASoC: rockchip: i2s: Add compatible for more SoCs 
This patch adds more compatible strings for SoCs.

Change-Id: I4238842f559d89b24fefc1d3bfebb9e8a64de3bd
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950562-14281-5-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit f005dc6db1)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
ca35f030a7 UPSTREAM: ASoC: rockchip: i2s: Make playback/capture optional 
There are some controllers which support playback only or
capture only. so, make it optional. and initial capability
by 'dma-names' of DT.

Change-Id: I6e3b519217e02db49ea7593cf356d138c14741d3
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950562-14281-4-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 4455f26a55)
 2021-09-06 16:16:00 +08:00
Xiaotan Luo
6f28200648 UPSTREAM: ASoC: rockchip: i2s: Fixup config for DAIFMT_DSP_A/B 
- DSP_A: PCM delay 1 bit mode, L data MSB after FRM LRC
- DSP_B: PCM no delay mode, L data MSB during FRM LRC

Change-Id: I9af4d98cf3c9fd9699093c44dba600d2fcfebdeb
Signed-off-by: Xiaotan Luo <lxt@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950562-14281-3-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 1bf56843e6)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
f1e03c22c5 UPSTREAM: ASoC: dt-bindings: rockchip: Document reset property for i2s 
This patch documents reset property for i2s.

Change-Id: I758123e579195ffbe6f6dfe5550a751d880c4a1b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1629950562-14281-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 296713a360)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
25fb9fce0e UPSTREAM: ASoC: rockchip: i2s: Fix regmap_ops hang 
API 'set_fmt' maybe called when PD is off, in the situation,
any register access will hang the system. so, enable PD
before r/w register.

Change-Id: I142537194d0ee279118a1d8d1377ca3c88ef68a9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950520-14190-4-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 53ca9b9777)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
3752871a8c UPSTREAM: ASoC: rockchip: i2s: Improve dma data transfer efficiency 
This patch changes dma data burst from 4 to 8 to improve
data transfer efficiency.

Change-Id: I0c33b4c37581ff4212dd86a936c7215fab9207b1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950520-14190-3-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 7a2df53bc0)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
559b95ba2c UPSTREAM: ASoC: rockchip: i2s: Fixup clk div error 
MCLK maybe not precise as required because of PLL,
but which still can be used and no side effect. so,
using DIV_ROUND_CLOSEST instead div.

e.g.

set mclk to 11289600 Hz, but get 11289598 Hz.

Change-Id: If622b02308860ef731047c05b675239554b7879e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950520-14190-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 6b76bcc004)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
2ca4af8b6d UPSTREAM: ASoC: rockchip: i2s: Add support for set bclk ratio 
This patch adds support for set bclk ratio from machine driver.

Change-Id: Id2ffa4f0e50fa0c2c36fa3eace4d47b901a7820c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629950520-14190-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit ebfea67125)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
e09d949bc7 UPSTREAM: ASoC: dt-bindings: rockchip: Add compatible for rk3568 spdif 
This patch adds compatible string for rk3568 spdif.

Change-Id: Idf2ed43ca8186f62efa732ca7e0be5377709c1d1
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1629800162-12824-5-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit e79ef3c2cf)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
8d8d68847f UPSTREAM: ASoC: rockchip: spdif: Add support for rk3568 spdif 
This patch adds support for rk3568 spdif which is the same
with rk3366.

Change-Id: I0b874471afda6c48283131aeb02e10de893673a7
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629800162-12824-4-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit c5d4f09feb)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
d2f314d9f5 UPSTREAM: ASoC: rockchip: spdif: Fix some coding style 
This patch fix some coding style.

Change-Id: I41dfa8a6b04cfdcd716a929a9eec7f27dee49fcb
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629800162-12824-3-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit acc8b9d117)
 2021-09-06 16:16:00 +08:00
Sugar Zhang
ef49a84f7a UPSTREAM: ASoC: rockchip: spdif: Mark SPDIF_SMPDR as volatile 
This patch marks SPDIF_SMPDR as volatile to make it resaonable,
which also requires marking it as readable, even though it isn't.

Change-Id: If74b1f79da6695af05ac08028c6637d8cfc5c4c9
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1629800162-12824-2-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 023a3f3a1c)
 2021-09-06 16:16:00 +08:00
Yang Yingliang
9ee45b537d UPSTREAM: ASoC: rockchip: spdif: Use devm_platform_get_and_ioremap_resource() 
Use devm_platform_get_and_ioremap_resource() to simplify
code.

Change-Id: I6a9ed25c24734e8b34c3f27aa610d7ce99a0f25a
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210615141502.1683686-3-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit 3325b1515a)
 2021-09-06 16:16:00 +08:00
Yang Yingliang
ed769e63f0 UPSTREAM: ASoC: rockchip: pdm: Use devm_platform_get_and_ioremap_resource() 
Use devm_platform_get_and_ioremap_resource() to simplify
code.

Change-Id: Ia073b65113717f676a1cbb838e10df4f33f236d4
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210615141502.1683686-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit db4d6d2e64)
 2021-09-06 16:16:00 +08:00
Yang Yingliang
b47a3f11b7 UPSTREAM: ASoC: rockchip: i2s: Use devm_platform_get_and_ioremap_resource() 
Use devm_platform_get_and_ioremap_resource() to simplify
code.

Change-Id: Icf5cb29b7745707b5e12459395653398b70c5e4c
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20210615141502.1683686-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit 4ffbcd4ab0)
 2021-09-06 16:16:00 +08:00
Krzysztof Kozlowski
6593ff7ff1 UPSTREAM: ASoC: rockchip: mark OF related data as maybe unused 
The driver can be compile tested with !CONFIG_OF making certain data
unused:

  sound/soc/rockchip/rockchip_i2s.c:569:34: warning: ‘rockchip_i2s_match’ defined but not used [-Wunused-const-variable=]
  sound/soc/rockchip/rockchip_pdm.c:463:34: warning: ‘rockchip_pdm_match’ defined but not used [-Wunused-const-variable=]
  sound/soc/rockchip/rockchip_spdif.c:44:34: warning: ‘rk_spdif_match’ defined but not used [-Wunused-const-variable=]

Change-Id: Ib4533440ad912d28ee7828f3ae4644219fe1a0c6
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201125164452.89239-12-krzk@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(cherry picked from commit 56af27ad5f)
 2021-09-06 16:16:00 +08:00
Jianqun Xu
7c357cd7cf pinctrl: rockchip: add rk3588 support 
Change-Id: If862a2abb9bdc87fc93c66055e0a4bc4522783c6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
 2021-09-06 15:05:38 +08:00
Jianqun Xu
2e550b7469 pinctrl: rockchip: add RK_GPIOx_Pxx definitions 
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I3b227f213c1cbd5bc1e11fc3875a358aae3f0dc6
 2021-09-06 15:05:31 +08:00
Sugar Zhang
c5fa3d62aa arm64: dts: rockchip: rk3588s: Add dsm/vad device node 
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I1dba3e89a3a4f9ca50579e4efabb12826e08235f
 2021-09-06 11:01:42 +08:00
William Wu
9af4aab053 Revert "mfd: add driver for fusb302 Type-C PD" 
This reverts commit a3cab91402.

The mfd fusb302 driver previously used for Type-C port
of rockchip platforms, but it's not compatible with the
new Type-C framework, and there's a new fusb302 driver
in the driver usb typec framework, so remove this driver.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I1665d765bbd928541e7528ed6de86c378a02f16b
 2021-09-03 18:03:08 +08:00
William Wu
ee8fee36ba arm64: configs: rockchip: remove CONFIG_FUSB_30X 
The CONFIG_FUSB_30X is used for legacy fusb302 driver
which has been deprecated, so remove it.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I722c8593be3a42f0b2434e284d3deb37e51429f1
 2021-09-03 18:01:07 +08:00
Guochun Huang
377c63c76f arm64: dts: rockchip: add rk3399 dsi device aliases 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I964f047b0cf9f6355d61630d03181f229fdd8c15
 2021-09-03 17:50:19 +08:00
Guochun Huang
c1901a5778 drm/bridge: dw-mipi-dsi: phy should be powered before STOPSTATEx/PHY_LOCK be asserted 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ibb16d08b69efcf4740e50643c2fb28a63eb39222
 2021-09-03 17:48:03 +08:00
Guochun Huang
c7a13590bd drm/bridge: dw-mipi-dsi: make lane byte clock cycles more accurate 
Change-Id: Ic510ef14161fdd1aa5441220520df50bb371ade4
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
 2021-09-03 17:48:03 +08:00
Guochun Huang
494a1a53f2 drm/rockchip: dsi: remove unused hs transition times table 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I265dd0e8fdc0ca1e7b051e7364d7d3f833ddb596
 2021-09-03 17:48:03 +08:00
Guochun Huang
f195bf6963 drm/rockchip: dsi: fix reset sequence for master 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I0c29df9c7dc03587a96e8206f6e82a08da0a797f
 2021-09-03 17:48:03 +08:00
Guochun Huang
31e9f77c4b drm/bridge: dw-mipi-dsi: remove the pclk which can be managed in runtime pm 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ib5287e452c0f40ab0bdaddf5a8f61f9d7abdb45a
 2021-09-03 17:48:03 +08:00
Guochun Huang
f5d16f932b drm/rockchip: dsi: dynamically manage the clock in runtime pm 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Idad08904c393f30b4bcc405edac09237696f5cf6
 2021-09-03 17:48:03 +08:00
Shawn Lin
d226c884fd mmc: sdhci-of-dwcmshc: Remove HS200 and HS400 at low speed for rockchip 
Rockchip platforms don't support HS200 or HS400 at low speed, so
we must limit it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I40eb9f117fd83789b6ab7a16d44049e16786698b
 2021-09-03 17:45:56 +08:00
Cai YiWei
a2d74ca47b media: v4l: add API to clear unready device 
Change-Id: I497719e6e8f2ef25a9d6402c16733bf4318d06d7
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-03 11:26:07 +08:00
Shawn Lin
f463bdf4d8 arm64: dts: rockchip: rk3568: Set SDHCI core clk to 200MHz 
As we mask our SDHCI controller as SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
host->max_clk is derived from core clock in the first place. Then
f_max works together with it.

If we adjust loader's core clk setting, such as 50MHz, we will get
50MHz for host->max_clk, because .get_max_clock() reads core clk
when probing driver. That will lead f_max be set to 50MHz as well,
no matter if max-frequency is set higher than 50MHz.

We can simple solve this problem by assigning core clk as 200MHz
in the first place and then let max-frequency property takes over
it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Idb2fdb8f68881d0286d977dc3718b74c30d3bc67
 2021-09-03 10:04:35 +08:00
Tao Huang
2c342bcc05 arm64: rockchip_gki.config: Enable CONFIG_PHY_ROCKCHIP_CSI2_DPHY 
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ia285c1c09f097a99ca6d76da5ae18094656659be
 2021-09-02 18:23:05 +08:00
Cai YiWei
d9b335b5d8 phy: rockchip: csi2-dphy: fix compile error 
Change-Id: I6afabfa78abe3202b308e8a4cfd547761bc2a6be
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2021-09-02 18:22:35 +08:00
Kever Yang
98e3dce8ad arm64: dts: rockchip: rk3588: Add support for multi-core 
RK3588 is an ARM DynamiQ architecture SoC, including 4 Cortex-A55 cores
and 4 Cortex-A76 cores.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: Id52349b39e28bc5a4fd3d0f17a712cd4c0797db8
 2021-09-02 18:02:18 +08:00
William Wu
bf6c596646 arm64: dts: rockchip: rk3588: add usb2 phy1 node 
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I9d8ce4b7e660b66a6d560502ccc895a2ec457173
 2021-09-02 16:36:32 +08:00
Tao Huang
621f6a5d90 arm64: dts: rockchip: Remove leading 0x from unit addresses in rk3588 
arch/arm64/boot/dts/rockchip/rk3588s.dtsi:921.32-933.4: Warning (unit_address_format): /iommu@0xfdc38700: unit name should not have leading "0x"
arch/arm64/boot/dts/rockchip/rk3588s.dtsi:935.32-947.4: Warning (unit_address_format): /iommu@0xfdc48700: unit name should not have leading "0x"

Fixes: e1e1eabccd ("arm64: dts: rockchip: rk3588s: Add mmu nodes for video codecs")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If259e78e4454266bccbbb51ee808f59c0e62ace7
 2021-09-02 16:34:20 +08:00
Frank Wang
95f6f44072 arm64: dts: rockchip: rk3588: add usbdp phy device node 
This adds USBDP combo PHY1 related nodes for RK3588 SoCs.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I2afb41c8f57ab49c13ecee110a78c9b7f011e3fe
 2021-09-02 14:44:26 +08:00
Jon Lin
0e542bf348 arm64: dts: rockchip: rk3588s: add spi node 
Change-Id: I4e72251952f5aae5b9588c4c5cb00de4f70b7ae1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
 2021-09-02 14:39:24 +08:00
William Wu
abdc763b77 arm64: dts: rockchip: rk3588s: add usb2 phy nodes 
The rk3588s has three independent USB 2.0 PHYs. And
each PHY has one port. The connection between the PHYs
and the controlles is as follows：

USB2 PHY0 to USB3 OTG0
USB2 PHY2 to USB2 HOST0
USB2 PHY3 to USB2 HOST1

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I300dcf4fdf6e4688a7e1598e9e2f4bb17d48acbc
 2021-09-02 10:36:09 +08:00
William Wu
d8b7417bea usb: dwc3: core: allow pm runtime for rockchip platform 
Most of rockchip platforms support power domain for dwc3.
Allow the pm runtime to manage the power domain for dwc3
in the dwc3 runtime PM routine.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I49e3fa207db8aea0355a797b69c9c8a791d2eaa3
 2021-09-02 10:18:24 +08:00
William Wu
7e4881a49e usb: dwc3: core: use 2.0 clk for 3.0 if only support 2.0 mode 
If the dwc3 core is programmed to operate in usb 2.0 only
mode, and no usb 3.0 phy, then it needs to set the bit
DEV_FORCE_20_CLK_FOR_30_CLK of GUCTL1 to make the internal
2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe) clock.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Change-Id: I217a380815c21903c1090bd003c1d8ba2fadbe7c
 2021-09-02 10:18:23 +08:00
Jianqun Xu
7e6d99ae56 arm64: dts: rockchip: rk3399 add pd for iep_mmu 
Fixes: 239c747658 ("arm64: dts: rockchip: rk3399: add iep device node")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Iec517750dd98af2d9814d97d7f3c2a9ff083f88a
 2021-09-02 09:56:40 +08:00
Jianqun Xu
9ee813b963 arm64: dts: rockchip: rk3399 fix rkvdec_mmu to vdec_mmu 
Fixes: a4e0ffd261 ("arm64: dts: rockchip: rk3399: add mpp support")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: Ie325e610071fecb69128981b821023b862099459
 2021-09-02 09:49:20 +08:00
Yifeng Zhao
1a6396458b phy: rockchip: naneng-combphy: add support rk3588 
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ice2a0219c3702dddeae91b4d0cb2dbbbcdb875fc
 2021-09-02 09:38:00 +08:00
Andy Yan
6a4797b6c4 drm/rockchip: vop2: Set correct possible_crtcs for writeback connector 
We only register used vp. So the registered crtcs may less than
the total vp on vop.

Fix warning:

[    0.495636][    T1] Bogus possible_crtcs: [ENCODER:345:Virtual-345]
possible_crtcs=0x7 (full crtc mask=0x3)
[    0.495681][    T1] WARNING: CPU: 0 PID: 1 at
drivers/gpu/drm/drm_mode_config.c:638
drm_mode_config_validate+0x1f0/0x2e8
[    0.495697][    T1] Modules linked in:
[    0.495717][    T1] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.43
[    0.495730][    T1] Hardware name: Rockchip RK3568 EVB1 DDR4 V10
Board (DT)
[    0.495741][    T1] pstate: 60800009 (nZCv daif -PAN +UAO -TCO
BTYPE=--)
[    0.495751][    T1] pc : drm_mode_config_validate+0x1f0/0x2e8
[    0.495765][    T1] lr : drm_mode_config_validate+0x1f0/0x2e8
[    0.495777][    T1] sp : ffffffc01003b8c0
[    0.495786][    T1] x29: ffffffc01003b8d0 x28: 0000000000000000
[    0.495804][    T1] x27: ffffff8003b23580 x26: 0000000000000001
[    0.495823][    T1] x25: 000000000000000f x24: ffffff8003bc2750
[    0.495839][    T1] x23: ffffffc0114aa4b8 x22: ffffffc0114aa438
[    0.495851][    T1] x21: ffffff8003bb4368 x20: ffffff8003bb4368
[    0.495863][    T1] x19: ffffff8003bb4360 x18: ffffffffffffffff
[    0.495879][    T1] x17: 0000000000049705 x16: 00000000000d42dc
[    0.495896][    T1] x15: 0000000000000113 x14: ffffffc01003b550
[    0.495911][    T1] x13: 00000000ffffffea x12: ffffffc011bbb7b0
[    0.495928][    T1] x11: 0000000000000001 x10: 0000000000000001
[    0.495945][    T1] x9 : 0000000000000003 x8 : ffffffc011a5b808
[    0.495961][    T1] x7 : ffffffc011bbb808 x6 : c0000000ffffbfff
[    0.495977][    T1] x5 : 000000000005ffe8 x4 : 0000000000000000
[    0.495993][    T1] x3 : 00000000ffffffff x2 : ffffffc011a5b788
[    0.496008][    T1] x1 : 4effea469dba5e00 x0 : 0000000000000000
[    0.496026][    T1] Call trace:
[    0.496041][    T1]  drm_mode_config_validate+0x1f0/0x2e8
[    0.496057][    T1]  drm_dev_register+0x16c/0x1f0
[    0.496074][    T1]  rockchip_drm_bind+0x4f4/0x568
[    0.496087][    T1]  try_to_bring_up_master+0x15c/0x1c8
[    0.496096][    T1]  __component_add+0xb0/0x198
[    0.496104][    T1]  component_add+0x10/0x18
[    0.496120][    T1]  dw_mipi_dsi_rockchip_host_attach+0x28/0xd8
[    0.496136][    T1]  dw_mipi_dsi_host_attach+0xd0/0x120
[    0.496149][    T1]  mipi_dsi_attach+0x24/0x38
[    0.496165][    T1]  panel_simple_dsi_probe+0x94/0x1c8
[    0.496180][    T1]  mipi_dsi_drv_probe+0x1c/0x28
[    0.496195][    T1]  really_probe+0x20c/0x3e8
[    0.496209][    T1]  driver_probe_device+0x54/0xb8
[    0.496224][    T1]  device_driver_attach+0x6c/0x78
[    0.496238][    T1]  __driver_attach+0xb0/0xf0
[    0.496253][    T1]  bus_for_each_dev+0x68/0xc8
[    0.496267][    T1]  driver_attach+0x20/0x28
[    0.496281][    T1]  bus_add_driver+0x168/0x1f8
[    0.496296][    T1]  driver_register+0x60/0x110
[    0.496311][    T1]  mipi_dsi_driver_register_full+0x54/0x60
[    0.496328][    T1]  panel_simple_init+0x30/0x44
[    0.496339][    T1]  do_one_initcall+0x48/0x2d8
[    0.496349][    T1]  kernel_init_freeable+0x254/0x2c4
[    0.496365][    T1]  kernel_init+0x10/0x108
[    0.496380][    T1]  ret_from_fork+0x10/0x18

Fixes: d8d8a665cd ("drm/rockchip: vop2: Only register used vp to drm")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I537b953d5597eeae70110e218892edca1e83a243
 2021-09-02 09:32:48 +08:00