Commit Graph

839316 Commits

Author SHA1 Message Date
Cliff Chen
3f399ec8bb f2fs: add a new limit for reserve root
The reserved root blocks is not enough for booting Android due to
the limit of 0.2% if the fs size too small. so we add a new mini-
mum limit is 128MB.

Change-Id: I5af3b182001d27e4d18b4090c5270bbb2ac6253b
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
2019-02-25 16:39:12 +08:00
Cliff Chen
b992ad3197 f2fs: modify f_blocks for statfs
The f_blocks of statfs include file system overhead,it is not normal
usage of Posix.

Change-Id: If481626b08c05290626938586e2dc721690f1a91
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
2019-02-25 16:31:50 +08:00
Tao Huang
78c2dd49b2 power: reset: reboot-mode: fix normal mode setup
If cmd is empty in get_reboot_mode_magic, we should return normal magic.

Change-Id: I10931adc49e33f72ae73d9471159f82cc02ff0c0
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-02-25 16:30:58 +08:00
William Wu
98465bfad1 usb: ohci-platform: disable ohci for rk3288
rk3288 ohci doesn't actually work on hardware, so we
need to disable it in ohci-platform driver.

Change-Id: I72750edda67358ff1e8fe66047bf60420500997e
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
William Wu
fa4da63174 usb: host: ehci-platform: Add basic runtime PM support
Like the runtime PM support patch of ohci-platform, we
add the same basic runtime PM for ehci-platform.

Conflicts:
        drivers/usb/host/ehci-platform.c

Change-Id: I84cbb15dd393e6af69b4cf6887f1628e2cba4999
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
William Wu
4e5b4527dd USB: ehci-platform: support EHCIs with usic phy
Some EHCI controllers use usic phy (e.g rk3399/rk3288),
in order to enable these controllers, we need to set
some additional EHCI vendor-specific registers.

Support this feature in device tree when using the ehci
platform driver by adding a new property for it.

Conflicts:
        drivers/usb/host/ehci-platform.c

Change-Id: I279ccfdb5866df49828825bfd41b39fcd58a2832
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
Frank Wang
a03c5f1ef5 usb: amend ehci no-relinquish-port for rk3288 platform
For the hardware bug of RK3288 OHCI, we use commit cfe6f1dd57
("usb: ehci: add rockchip relinquishing port quirk support") to fix
it previously. However, it have been ineffective after upstream commit
94c43b9897 ("USB: Check for dropped connection before switching to
full speed") was merged due to the condition of relinquishing port was
changed.

This patch adds an additional condition for the previous commit to ensure
no relinquish port quirk can take effect for RK3288 EHCI.

Change-Id: I0630265e101afb349816955e069e1c121745ac08
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
William Wu
2815b3d1d9 usb: ehci-platform: use no relinquish port quirk only for rk3288
rk3288 and rk3288w use the same dts which includes no relinquish
port quirk, however rk3288w ohci can work well, so we need to add
an additional condition to disable ohci only for rk3288.

Change-Id: Ic2bd0ce577cbebe7ae2cf1b153f9e46935022f77
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
Frank Wang
f79a9edb89 usb: ehci: add rockchip relinquishing port quirk support
Add a quirk to support rockchip relinquishing port from abnormal ohci
to ehci when FS/LS devices plug in.

To support this function, the rockchip-relinquish-port property must be
specified in ehci node of dt.

Conflicts:
        drivers/usb/host/ehci-platform.c

Change-Id: I91b58905132282ef2a836d54a1c7ace1e334d119
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2019-02-25 16:20:35 +08:00
Shawn Lin
83681e60ed mmc: dw_mmc: initialize zero for dma_slave_config
This fixes uninitialized variable introduced by commit ddd2e87ad4
("dmaengine: pl330: add support for interlace size config")

Change-Id: Ib1bbec21053fbcccf85a339d8ed7eec0bbe77727
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 16:17:34 +08:00
Shawn Lin
d86ffdff59 mmc: core: export retune_enable/disable api for wifi drivers
Change-Id: I084e155ed71057fa7f39e160a4f3fde964557185
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 16:14:18 +08:00
Shawn Lin
5ffbedd300 r8169: add new device ID support
It's found a new r8169 ethernet card with a device ID of
0x0000 read from its config header which wasn't in the
ID tables of r8169. Add it in order to probe this card.

Change-Id: I27c542a10cc571a6e1a4e7a8af62ce560b8b1fc4
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 16:10:22 +08:00
Shawn Lin
10e85e8d4c soc: rockchip: grf: postpone jtag switching for PX30 Soc
PX30_GRF_SOC_CON5 is intended for postponing the auto switch
of pinmux from SDMMC to JTAG after removing the SD cards.
However, the default value is too small to meet the actual
requirement. Increase this value to 5 seconds currently.

Change-Id: I18fafe07822b81d9cd448ab71c1f0e49a75db357
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 16:05:27 +08:00
Shawn Lin
7347f7084d phy: rockchip-emmc: improve calpad busy trimming
Change-Id: I31302c7468879d244cbf1c74976596312e826c6a
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 15:37:29 +08:00
Shawn Lin
c8b3f1fe1c mmc: block: add dependency of emmc_disk flag
Rockchip platform now not only use dw_mmc but also
the sdhci-of-arasan could be used as emmc. So we need
to add its dependency when setting emmc_disk flag.

Change-Id: I84f99657b874a15e60063b1b4ff94fd90cc191c3
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 15:37:16 +08:00
Shawn Lin
5a9f535177 FROMLIST: mmc: core: fall back host->f_init if failing to init mmc card after resume
We observed the failure of initializing card after resume
accidentally. It's hard to reproduce but we did get report from
the suspend/resume test of our RK3399 mp test farm .Unfortunately,
we still fail to figure out what was going wrong at that time.
Also we can't achieve it by retrying the host->f_init without falling
back it. But this patch will solve the problem as we could add some log
there and see that we resume the mmc card successfully after falling
back the host->f_init. There is no obviousside effect found, so it seems
this patch will improve the stability.

[   93.405085] mmc1: unexpected status 0x800900 after switch
[   93.408474] mmc1: switch to bus width 1 failed
[   93.408482] mmc1: mmc_select_hs200 failed, error -110
[   93.408492] mmc1: error -110 during resume (card was removed?)
[   93.408705] PM: resume of devices complete after 213.453 msecs

Change-Id: I5b24cb84a223394392450a1f10d8bbacb9e1006e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 15:35:45 +08:00
Shawn Lin
3b9fac1a1b mmc: sdhci-of-arasan: wakeup genpd in probe
Let's keep genpd for sdhci alive while entering deep
sleep which gte me out of yapping around.

Change-Id: I0da20b417621d277745bafd53d1ee461aae72e11
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 15:30:33 +08:00
Shawn Lin
de208e40d9 mmc: porting legacy tactices into 4.19
Change-Id: Ieb0e609f5cad4e889be6194f8fd8a54057a1174b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2019-02-25 15:19:06 +08:00
Xu Jianqun
03d96331f1 clk: rockchip: add clock ids for vip of RK3368 SoCs
Change-Id: I73ac0fd0010d0dc95c6da0770f85d7b35a11a628
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:08 +08:00
Xu Jianqun
00c75f4839 clk: rockchip: remove CLK_IGNORE_UNUSED from rk3368 usb otg clocks
Change-Id: Iea6c2e8cd011bcaab30c6f6ce2ed7a9ab7a8711c
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:08 +08:00
Xu Jianqun
e6e05d2b33 clk: rockchip: add HCLK_USB_PERI for rk3368 usb
Change-Id: Ib1fad4af45ac5ba42ddd97918385aee3bd58e18e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Xu Jianqun
ba22cd12d4 clk: rockchip: add SCLK_CRYPTO for rk3368 crypto
Change-Id: I5ea4bca3e164df50e720ef748f8ece4511330d70
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Xu Jianqun
3db3717c1e clk: rockchip: rk3368 plls' supports 1188MHz
Since HDMI needs clock rate 74.25MHz, so plls must support
a multiple of it.

For Rockchip rk3368 pll has better jetter with 1188MHz, so
add 1188MHz support.

Change-Id: I68c7333ae076ecabf8637298ee8ca43149cb17d1
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Jianqun xu
fcdeca01d1 clk: rockchip: add and use clock id for mipi dsi 24M clock
Add dt-binding for mipi dsi 24M clock, and use it.

Change-Id: I1f4dfac958b8b5dacfa6da02151dc3d6a2bd27a7
Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Jianqun xu
23d9961a87 clk: rockchip: rk3368: use the clock IDs for DPHY clocks
The DPHY(DSI PHY) in Rockchip rk3368 supports MIPI/TTL/LVDS
mode. Use the clock IDs (PCLK_DPHYRX and PCLK_DPHYTX0) for
DPHY clocks.

Change-Id: I6a133d6da839d6545e507f38b361b3457e5ff3ee
Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Jianqun xu
d12a79c0ac clk: rockchip: rk3368: add dt bindings for DPHY clocks
Add two clock IDs for DPHY clocks of Rockchip rk3368 SoC.

Change-Id: Iaae4da4a0ea9f4dee2b04fb8eb4f9400bd86511f
Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2019-02-22 18:11:07 +08:00
Huibin Hong
d15ef7c591 soc: rockchip: grf: unmask uart dma request for RK3308 Soc
Change-Id: I06d955d92d04785bea3248b82fe99c515d471467
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:38:05 +08:00
Huibin Hong
9219340e40 irqchip/gicv2/3: add gic_retrigger
Change-Id: Ic87d4936317fb598c04e3ccc56a850c0c9e4e6ba
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:36:13 +08:00
Huibin Hong
e480347688 serial: 8250: enable Programmable THRE Interrupt for tx
Programmable THRE Interrupt mode in order to increase system
performance.

Change-Id: Ic1ef9ecae0c6feb00170ad97ee3c6245ca3bf068
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
68ae37643a serial: 8250: support rx dma mode only
Most SOCS have only 8 or 6 channels, but have more than 16
peripherals. If those peripherals work together, some
fails to request dma channel, because there are no enough
channels. And maybe it's unnecessary to use dma for uart
tx. It is necessary for uart rx when hardware auto flow
control is not used.

&uart0 {
	dma-names = "!tx", "rx";  // disable uart tx with dma
	status = "okay";
};

Change-Id: Ia74477514ba57300a4d19a5c2565ae7b5b8ab521
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
e019b9df43 serial: 8250_dma: support rockchip dma transfer
Change-Id: I0735c41c7d55770eb24c6dede62d623ae8285bdd
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
064129e223 serial: 8250_dw: lost one byte sometime when receive
To avoid "too much work for irq" issue, cherry pick the the patch.
It reads the RBR to clear the time out interrupt, but sometime the
rx fifo may be not empty while cpu reads the RBR. Which would cause
the data lost.

patch for "too much work":06451e93ab59e5b1843c29cbb468a274f4919563

By the way, current patch can't get rid of the risk entirely, so I
try a lot to solve it. Unfortunately, I only got the phenomenon that
lower pclk can reduce the probability. And I check the dw data sheet,
it has pclk and sclk, so there is synchronization problem. But it
only requires (slck < 4*pclk).

Change-Id: I01a36c689b43310294c45294abcf4982f5ddf2af
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
b2aec6e19d serial: 8250_dw: clear time out interrupt when in dma mode
Change-Id: Iebeacce7cea7be8a71ae0dad17db5bcdeb26d52a
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
584044d78b serial: 8250_dw: new baud rate and clk solution
baud rate <=1500000, except 1152000, use 24MHz
baud rate > 1500000, and 1152000 use pll

Change-Id: I9f52fcafdf8cc3d32be78f8408ab75873ffff680
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
f453308641 serial: 8250_dw: set uart clk according to buadrate
Change-Id: I27f92816b202bbe4fa9d97f7656721661afbaa6e
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
f047159701 Bluetooth: hci_ldisc: fix race between open, close and send data
Fix the bug below, it may be reproduced after open and close bt about 7000 times:

<1>[73036.938137] Unable to handle kernel NULL pointer dereference at virtual address 0000001c
<1>[73036.939316] pgd = ffffff800886d000
<1>[73036.939627] [0000001c] *pgd=000000000fffe003, *pud=000000000fffe003, *pmd=0000000000000000
<0>[73036.940396] Internal error: Oops: 96000006 [#1] PREEMPT SMP
<4>[73036.940899] Modules linked in:
<4>[73036.941193] CPU: 2 PID: 2989 Comm: kworker/2:2 Not tainted 4.4.138 #3
<4>[73036.942409] Workqueue: events hci_uart_write_work
<4>[73036.942836] task: ffffffc00d688ac0 task.stack: ffffffc00b184000
<4>[73036.943365] PC is at _raw_spin_lock_irqsave+0x1c/0x50
<4>[73036.943815] LR is at skb_dequeue+0x20/0x74
<4>[73036.944185] pc : [<ffffff8008576398>] lr : [<ffffff800840f9a4>] pstate: 800001c5
<4>[73036.944832] sp : ffffffc00b187d00
<4>[73036.945127] x29: ffffffc00b187d00 x28: 0000000000000000
<4>[73036.945620] x27: 0000000000000000 x26: 0000000000000000
<4>[73036.946114] x25: ffffffc00e1280e0 x24: ffffffc00038d000
<4>[73036.946606] x23: ffffffc00e1271f8 x22: ffffffc00e127f00
<4>[73036.947099] x21: 000000000000001c x20: 0000000000000008
<4>[73036.947592] x19: 0000000000000000 x18: 0000000000000000
<4>[73036.948086] x17: 0000007fade08530 x16: ffffff80080e308c
<4>[73036.948579] x15: 0000000000000000 x14: 65736f6c63207568
<4>[73036.949073] x13: 205d303537373339 x12: 2e36333033375b0a
<4>[73036.949566] x11: 3220746e63666572 x10: 00000000000006f0
<4>[73036.950060] x9 : ffffffc00b187d30 x8 : ffffffc00d689210
<4>[73036.950553] x7 : 0000000000002d31 x6 : 0000000000000400
<4>[73036.951046] x5 : 0000000000113d82 x4 : 0000000000002f32
<4>[73036.951539] x3 : 0000000000000140 x2 : ffffffc00d688ac0
<4>[73036.952032] x1 : 0000000000000001 x0 : 000000000000001c
<4>[73037.068289] [<ffffff8008576398>] _raw_spin_lock_irqsave+0x1c/0x50
<4>[73037.068858] [<ffffff8008377094>] h4_dequeue+0x14/0x1c
<4>[73037.069335] [<ffffff8008376924>] hci_uart_write_work+0x50/0x12c
<4>[73037.069893] [<ffffff80080abbc8>] process_one_work+0x1b0/0x294
<4>[73037.070426] [<ffffff80080ac920>] worker_thread+0x2d8/0x398
<4>[73037.070935] [<ffffff80080b0f28>] kthread+0xc8/0xd8
<4>[73037.071388] [<ffffff8008082e80>] ret_from_fork+0x10/0x50

	thread0               		thread1
	   |				   |
	hci_uart_tty_close		hci_uart_write_work
	   |				   |
	h4_close			h4_dequeue
	   |				   |
	free (h4_struct) h4		   |
	   |             _raw_spin_lock_irqsave access h4 null pointer

Change-Id: I61d8ad5fb4c9349e0a304d2e87332681240f22e2
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
5ea0787207 serial: 8250_dw: uart wake up
Add wakeup-source to uart dts node to enable uart
wake up system when it receives data.

Change-Id: If4e82a4d3dbaca708209553dc3693089864c782f
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
b4541c23c7 serial: 8250: add /dev/ttySx when uart is enable
before the patch:
ls /dev/ttyS
ttyS0 ttyS1 ttyS2 ttyS3 ttyS4 ttyS5  ttyS6 ttyS7

after the patch:
ls /dev/ttyS
ttyS3  ttyS4  ttyS6

Change-Id: I844523408751cb579bbfb50fafb7923d5c2cafdf
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
ad2746d975 serial: 8250: add line error log
Change-Id: I69fe6f0c0857ade25e777be388fcab6261f1a533
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
45de5af8a8 serial: 8250: reset uart when set baud rate
If external device sends data continuously, then uart is
always busy, and baud rate can't be set. It is useful
to reset uart and set loop back mode to make sure it is
idle.

Change-Id: I87286711870ff685ea29e36e61c97d45be5a6d08
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
0f27d1cbb4 serial: 8250: modify warning log about dma request fail
Change-Id: Ib26ef05bb04542ff8d4527a8e7a79cae4dcaa31d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
2003c94bc0 serial: 8250: set fifo rx trigger 1/2 of fifo
To reduce the uart interrupts, which may cause:

serial8250: too much work for irq xx

Change-Id: I89e0d990677e4cffae431e60521b3e16e8381f05
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Huibin Hong
f18548643d serial: 8250_dw: set CPR 0x00023ff2 if it is 0
The UART CPR may be 0 of some rockchip soc,
but it supports fifo and AFC, fifo entry is 32 default.

Change-Id: I44f420c556f703c2848c38dc8449546274ef887d
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-22 14:31:44 +08:00
Frank Wang
243d0b8d2a hid: usbhid: enable hid to wakeup system if it supports remote wakeup
Refer to E.2 (P67) of Device Class Definition for Human Interface
Devices V1.11, the bmAttributes field of the standard configuration
descriptor bit 5 should be set if the HID support Remote Wakeup.

This patch enable the usb HID to wake up the system if the HID
supports remote wakeup.

Change-Id: I169c49ff6187b6400b91633332a72964caca1a94
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit e1653e4dc5)
2019-02-21 09:08:31 +08:00
Tao Huang
6e01437ec4 fiq_debugger: setup_timer() -> timer_setup()
Change-Id: Ia789a1e1d005cf311ab0a7a9e352ec9c9991e30b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-02-19 15:46:04 +08:00
Jeffy Chen
ce9a9e4504 fiq_debugger: Add proc_show like other tty drivers
The userspace might check tty information in proc fs.

Folded following develop-4.4 commit changes into this patch:
77e938e49d ("fiq_debugger: Sanity check state in fiq_tty_proc_show")

Fix for 4.19.

Change-Id: If3e81aacbc7948dd3000606702296bc2b76bec09
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2019-02-19 15:45:11 +08:00
Huibin Hong
6ef6d9e3b6 fiq_debugger: rockchip: deal with this_cpu and current_cpu are different
If this cpu is not the same as current cpu, it means we don't use
current cpu any more, and this cpu handles uart interrupt. So it
is unnecessary to set uart interrupt to this cpu again.

Change-Id: Ia454af96ee766dcbc8b22339652a4aa7eb229568
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-19 15:45:11 +08:00
Huibin Hong
164e4da1f5 fiq_debugger: rockchip: move uart_init to the last
1.When fiq debugger driver probes, and uart rx is pulled low.
The uart interrupt comes so early that uart handler can't be
called. Which makes interrupt come frequently and block the cpu.
2.Remove '<hit enter to activate fiq debugger>'.

Change-Id: I4656d6942bb2cbb0e992852a52bc82f71deadda8
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2019-02-19 15:45:11 +08:00
Tao Huang
fce07a27c8 ARM: fiq_glue: fix compilation error for THUMB2_KERNEL
Change-Id: Ia5a7e0c8bcdcc33880f6048d71068a5ccb1c042e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
(cherry picked from commit ae98ee15abc476711d04b5885848ee6570ee816d)
2019-02-19 15:45:11 +08:00
Tao Huang
5cc432cbd0 fiq_debugger_arm: fix compilation error for THUMB2_KERNEL
Change-Id: Ib1313150393a572b446f9294bc1645ca0d035606
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit 70be40088b78d57589c3d999ffd749f41ca31c6e)
2019-02-19 15:45:11 +08:00