The CONFIG_ROCKCHIP_ANALOGIX_DP may be enabled for VOP or VOP2,
so make its dependency consistent with the configs of other
interfaces.
Fixes: b382406a2c ("drm/rockchip: Make VOP driver optional")
Change-Id: I272926898bf520d5e023e0bbb873f680362b68ee
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Currently, the husb311 driver enable irq wakeup by default,
it can wakeup system if the vbus or the CC state changes.
However, if the Type-C port data role is DFP and the vbus
is power on, after enter deep sleep, the vbus maybe power
off for low power management, this cause system resume
immediately by husb311 irq.
Actually, the husb311 vbus irq wakeup is no need if the vbus
state changes for DFP mode. This patch only enable irq wakeup
if the vbus is power off, it can support husb311 irq wakeup
system if the Type-C connect with Type-C charger or Type-C DFP.
And disable husb311 irq if the vbus is power on, it can avoid
the tcpm_state_machine_work run before the husb311_pm_resume
during system resume.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I62d35b10b6b2375125b32101426ea141f709ed91
dec->fix is used in rk3568 and rk3576, while CONFIG_CPU_RK3568 and
CONFIG_CPU_RK3576 are all defined, it will hack error.
Thus, the compatible need matching, then hack.
Change-Id: Icd1368c9f414422c0403d425ba732f20579b550d
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
Since the BMCIO_OSC_EN bit is enabled automatically when the interrupt
occur whether the power is off or on, replace to TCPC_FILTER reg that
amended by software in husb311_init.
Fixes: f414167ae0 ("usb: typec: husb311: pm process support")
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I5bd0ffa395aae1e007705a791ff03a77ec85034a
At vop2_wait_for_irq_handler() we need to synchronize frame start irq,
This is to avoid the ongoing commit very close to fs, and might be racing with a
requested vblank interrupt, which would increment the software vblank counter
before the changes being committed actually happen.
besides, from rk3576 vop can support independent irq for each vp, we
confirm vop2->merge_irq state at vop2_bind, and simplification other
function logic.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: If93d8de7840590645c53bd3720eaca2f818a3cbe
NV20 and NV30 is supported by drm core, so no need to depend on
CONFIG_NO_GKI.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I74dbd8e69367dd1d705624e07e6a6ea2bb9a21f8
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled
variant of NV15, a 10-bit 2-plane YUV format that has no padding between
components. Instead, luminance and chrominance samples are grouped into 4s
so that each group is packed into an integer number of bytes:
YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes
The '20' and '30' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 4.
V2: Added NV30 format
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Sandy Huang <hjc@rock-chips.com>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Tested-by: Christopher Obbard <chris.obbard@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-2-jonas@kwiboo.se
Bug: 300024866
(cherry picked from commit 728c15b4b5f3369cbde73d5e0f14701ab370f985)
Change-Id: Ia8fbb5b785c6fc2b4d188bbcef62e232c2ba8ce8
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This patch adds USB_QUIRK_RESET for Alcor Micro
Flash Drive (idVendor=058f, idProduct=6387) to
fix read/write issue after system resume from
deep sleep.
Change-Id: I35e0d511a80255a18eb842412ff9905c039df9bf
Signed-off-by: William Wu <william.wu@rock-chips.com>
1.fix lsc error of first frame
2.fix scl update hold when isp working
3.fix resolution config for unite mode
4.resume to restore dhaz iir data
Change-Id: I070b0dbef0eef404d040dedf4555cc7fe335de6f
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
net/rfkill/rfkill-wlan.c:697:22: error: redefinition of 'wlan_early_suspend' as different kind of symbol
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Id439523b64fa9fc99b5208c0c2a811e157fd5a9c
Vdpu383 doesn't reset the register when it is enabled.
In order to avoid exceptions, it is necessary to
configure the initial value when it is enabled.
In addition, ip_en involves cru mode, which is related
to the IP work frequency. It is necessary to ensure
that it is configured correctly.
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
Change-Id: I7047faababe1747547d18cb51e1e3b527e2c8d35
Before:
default y if CPU_XXXX
After:
depends on CPU_XXX
default y
When a CPU_XXXX config is not selected, the config will be
automatically deselected.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I95bbc481b6747d82637167b0f2b057732eb7112e
Before:
default y if CPU_XXXX
After:
depends on CPU_XXX
default y
When a CPU_XXXX config is not selected, the config will be
automatically deselected.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Iff7361f6515e1fda72a4993a514ad948876e8850
Before:
default y if CPU_XXXX
After:
depends on CPU_XXX
default y
When a CPU_XXXX config is not selected, the config will be
automatically deselected.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I380b2158def41949086ceb49133e5f905c4e17e6
Before:
default y if CPU_XXXX
After:
depends on CPU_XXX
default y
When a CPU_XXXX config is not selected, the config will be
automatically deselected.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If10a37e81221ddd69a32e528c2642d8b0065b309
Before:
default y if CPU_XXXX
After:
depends on CPU_XXX
default y
When a CPU_XXXX config is not selected, the config will be
automatically deselected.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I113d92a4ccaed1e93e79b8c69d8595f4354be496
Restore link if controller or device is powered down in runtime PM
or system PM.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iec19935386fa532e537932ac5897de438371016e
Increase vepu's default frequency to 702M to meet the encoding
performance requirements for single-core 4k30.
Change-Id: I306f9d16e36b692b61c3aeae3d1c297923fd5e48
Signed-off-by: Yanjun Liao <yanjun.liao@rock-chips.com>
1. Add reboot frequency for opp table.
2. Add intermediate threshold frequency for opp table.
3. Add suspend opp for cpu opp table.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8863074713431f566336a70199f9b9e79ca1e7e3
