PD#SWPL-14701
Problem:
AppleTV box always read SCDC status whether EDID support 2.0 or not
Solution:
1.Cannot disable scdc function at hdmi1.4 mode.
otherwise appletv didnot sent valid data
2.remove oscillator mode in algorithm of PHY pll
Verify:
962X2
Change-Id: I6b87c8268073e52f2393844989fcf50057a99ace
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-14776
Problem:
aud pll is zero. need to reset aud bandgap
Solution:
modify related recovery flow
Verify:
TXLX
Change-Id: If8ba596cb7bec81165a0b2f80aa388579cc68411
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-14763
Problem:
rx cannot work after suspend
Solution:
rx22 memory issue. revert related commit.
Verify:
TL1
Change-Id: Ia3a092e2fc602470e4ffc54f0d3b25ae0221f69f
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-14563
Problem:
hdcp_rx22 passed a wrong HPI address to hdmirx driver,
and cause HPI address request_mem_region fail
Solution:
Use the correct HPI address when request_mem_region called.
Verify:
TL1
Change-Id: I80bd6323ae4959edf3c792758568c581024536bb
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-14041
Problem:
sometimes after hpcp_hpd 0->1, ESM doesn't
respond to AKE_INIT, it will lead to flash
red screen on TCL DCLS-HG50
Solution:
add control for hpcp_hpd, keep it high by default
Verify:
X301
Change-Id: I8f8e5c880400084d6ed252667460c4e397b9909d
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-13667
Problem:
some devices may forcely send signal above 3.4G
even if TV announce hdmi1.4 edid, such as apple
TV box, Samsung UBD-K8500 dvd; and for QD6508 box
of TCL, it will not send signal out if scdc NAK
Solution:
add a scdc force enable option to cover this
issue. by default, scdc is enabled or not
accroding to current edid version
Verify:
X301
Change-Id: Ibdacbd3bb1edbdcb99637252530d19510fbcfb1d
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
Conflicts:
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
PD#SWPL-12502
Problem:
new function
Solution:
add new function of TM2
Verify:
T962E2
Change-Id: Idd5843d39bb9235fe0abdf9aaaca3be6dd2795e7
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#TV-7517
Problem:
hdmi hdr color deepth mode is auto, if input
is 8bit mode, output is 8bit mode
Solution:
when is hdr mode, force set 10bit mode to frame
buffer.
Verify:
tl1
Change-Id: If958f687e3923389277880e19d47f933421a8292
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
PD#SWPL-8153
Problem:
Flash blurre screen when change all 4K format
Solution:
if no video buffer resouce, needn't set afbce regiter
when need switch afbc mode.
Verify:
tl1
Change-Id: Ifb867cdeda2b6d3536246b79531a5bf9027e01a1
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
PD#SWPL-13779
Problem:
esm can not work after burning a new key and regenerating new
fw.le as the esm clock was not configured when probe.
Solution:
so we need to configure ESM clock no matter hdcp2.2
is burned or not.
Verify:
None
Change-Id: I793b63ad2f20434b9f8f27ccca7c80dee2990718
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-13130
Problem:
on LG UBK80-N DVD, hdcp22 auth passed before esm reset,
auth status will be reset, result in black screen
Solution:
delay hdcp22 auth to after esm reset
Verify:
TXLX
Change-Id: I4e7fe60cf3117712eea5f8b1eec65d544b557a48
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-2564
Problem:
hdcp_rx22 ocupy too much CPU resources
Solution:
1.Optimize hdcp_rx22 polling method
2.The driver code should match the hdcp_rx22 whose version is
HDCP2.2 RX0719
Verify:
Android P
Change-Id: I4e1ab48d4eb3b74de070a36cd719c67370f26505
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#TV-7049
Problem:
hpd keeps high when cec auto power on disabled, not
match the requirement of CVTE hotplug function test
Solution:
pull hpd low when cec auto power on is disabled
Verify:
tl1
Change-Id: I7ab885894585b62d76f5dad8cdcbec9d754ef274
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-10930
Problem:
1.hdmirx driver does't know currently used edid version
2.SCDC only used for HDMI2.0 mode
Solution:
1.add version parse of current edid
2.Disable SCDC for HDMI1.4 mode
Verify:
TL1-x301
Change-Id: I00f05fee1d1d61847983ee390556644b03b456a3
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-9686
Problem:
hdmirx cannot support HDR10plus
Solution:
add packet analysis of hdr10plus.
Verify:
tm2_ab311.
Change-Id: Ic98c3fa57ce6da3262285febc587fb2cac2be0fa
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-2894
Problem:
vdin for support DV LL mode
Solution:
1.add dv 1.5 LL mode support
2.fix vdin mem dump method,only dump active zone
3.add support RGB and 12bit for dv LL mode
4.add vsi info param of dv LL mode
5.dolby vision LL 422 12bit mode,RX need to enable tunnel
Verify:
tl1
Change-Id: I4ddad1310bcc6d2f777bf7099ac26fe2db812b22
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
PD#SWPL-8467
Problem:
1.no index parse for edid data block
2.no earc capabilities data structure parse
3.no earc cap data structure splice function
4.no cta data block splice/remove function
Solution:
1.add edid data block index parse
2.add earc capabilities data structure parse
3.add splice function of earc cap data structure
4.add splice/remove function of data block to edid
Verify:
TL1
Change-Id: I47b9f2176c31c65a08cdc657c00398f88cbdd7d3
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-7952
Problem:
vdin0 cma_size is not enough for some board
Solution:
1.change hdmirx skip_vf_num to 1.
2.increase vdin0 cma_size to 200M for 4k YUV444 10bit support,
other resolution usage will be lower,
such as 4k YUV422 10bit 160M.
Verify:
ab301
Change-Id: I353e2f9e5e6a25c8c3a34e10813039e9bba7e4a6
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
Conflicts:
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
PD#SWPL-6792
Problem:
EDID buff change to independent mode for each port
Solution:
1. add new edid update method
2. fix dv status issue for dv10
Verify:
Verfied on TM2 skt board
Change-Id: I274e5c08168b79fcfab0d2575a6531ab9802af3f
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-7084
Problem:
hdmirx signal detection time is long
Solution:
Optimize the phy pll init logic
Verify:
TL1
Change-Id: Ibdfdb3a54d2a5cbdf4f6292b85616fdba36c37a9
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-8032
Problem:
Switching to HDMI source is slower than T962
Solution:
ensure pll lock is table before do DWC reset
Verify:
T962X2
Change-Id: I1133d6b1fb532ab8460c1906a021fe133ea9fb83
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-6400
Problem:
need sync code with mainline
Solution:
sync mainline's print and coding style
Verify:
verify by marconi
Change-Id: I1934cf01f8e1ff87a0c9ab59a7288d2b6edaff84
Signed-off-by: Lei Qian <lei.qian@amlogic.com>
PD#SWPL-7452
Problem:
TV is no signal when turn off and turn on dishNXT box
Solution:
clear hdcp avmute status if hdcp is not start
Verify:
962X
Change-Id: I0448e46baea4f8666b2b665f6c867fecb41fb7d0
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-6400
Problem:
hdmirx phy clk_out is not stable,and causes long detection time
Solution:
VLSI provide a new PLL init sequence
Verify:
TL1
Change-Id: I42b98572226aafc8e61e36b6a2e5dfad078fd8fe
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-7570
Problem:
there's frequent interrupt when suspend, and can't
enter suspend successfully
Solution:
disable interrupt when suspend/shutdown
Verify:
x301
Change-Id: Iad13159da8cf0d48c6374c17df957c26aa177024
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-6785
Problem:
there's garbage frame show when signal change
Solution:
enable forward video frame skip interface, and set vdin
to skip one more frame to prevent garbage been shown
Verify:
X301
Change-Id: Id099558c733843f330b99246ea31fbbd0c18ed84
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
Conflicts:
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c
PD#SWPL-6360
Problem:
Connect PS4PRO,plug out than in,the audio will show faster than video.
Solution:
1.update CDR lock logic;
2.add sw_reset_align and sw_reset_chan;
3.update phy init sequence;
Verify:
TL1
Change-Id: I0ef259502579a7edd2c61708c81983ce07124c9f
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-6234
Problem:
flash line in the screen when HDMI connect iTV IV3010 box.
Solution:
1.update phy low frequency setting;
2.optimzie pll init sequence to save some detection time;
3.update verB pll setting(0323);
Verify:
TL1
Change-Id: I71225b06f02e4888ce093780a2beb0a381986293
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-4308
Problem:
gpu limit cause cts performance test fail
Solution:
limit gpu only when video playing or hdmiin
Verify:
P321
Change-Id: I682a908957491c8445fdb384dedd404169757e2b
Signed-off-by: wenbiao zhang <wenbiao.zhang@amlogic.com>
PD#SWPL-5668
Problem:
recognized as dvi after suspend/resume
when connect xiaomi mtk box
Solution:
when resume, add rxsense pulse to avoid
sda pulled low by xiaomi mtk box
Verify:
TL1-T962X2_X301
Change-Id: I480cbb4376bbb0c3b38318df2e26f5cc85db3d59
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-5813
Problem:
HBR audio cannot work on TL1
Solution:
add a debug interface force hdmi afifo in 8ch mode
Verify:
t962x2
Change-Id: Ied02f772634e2c326e18f6d6463c0ae000430e29
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-5579
Problem:
audio fifo underflow after switch audio pattern
on chroma 2233: only 2ch audio in, but audio fifo
is configed to read out 8ch afifo. chroma 2233
may change from multi-channel(witch audio overflows
and workaround to config read out all subpackets)
to 2-channel audio pattern, then issue happens.
so need to reset audio fifo config.
Solution:
except for workaround case, always config audio
fifo to only store valid subpackets.
Verify:
tl1
Change-Id: If32a55330fa7ebd9f6359a460eea4ad62872207b
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
PD#SWPL-4981
Problem:
it_content info is not correct
Solution:
optimize the method for getting it content
Verify:
TL1
Change-Id: Ie9202b6496742af6d880ae22f3f8f6154db8629a
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
PD#SWPL-4325
Problem:
it took long time to show image when connect with Google Chromecast box
Solution:
1. add specific dev detection by cec osd name & vendor ID
2. chromecast box force OESS
Verify:
verify by marconi
Change-Id: I56d247da1d1b1e28b60bb439f5173cb6fbecfdf9
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
hdmirx: Chromecast box force to OESS mode [1/1] (Partial)
PD#SWPL-4325
Problem:
it took long time to show image when connect with Google Chromecast box
Solution:
1. add specific dev detection by cec osd name & vendor ID
2. chromecast box force OESS
Verify:
verify by marconi
Change-Id: I56d247da1d1b1e28b60bb439f5173cb6fbecfdf9
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-4261
Problem:
some devices have compatibility issues.
Solution:
1.update phy setting;
2.optimize some SW logic;
3.set eess_oess to auto mode;
4.fix black screen(DE fixed error,related with rx phy) issue.
Verify:
TL1 TXLX android P
Change-Id: I842a4782b3e513fa1e483feca98ce05b128d79fc
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
PD#SWPL-4088
Problem:
There will be kernel panic when read edid via hdmirx
driver interface
Solution:
modify the rd_top interface
Verify:
TL1 android P
Change-Id: Ifb595cc66a2e792bc5153d726258deb7ba4e741c
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
