Commit Graph

643464 Commits

Author SHA1 Message Date
pengcheng chen
a4473b90ed osd: remove wiat vsync in pan_display
PD#154106: osd: remove wiat vsync in pan_display

Change-Id: I02e460d17cc23f316c9c9ff6d475d529fa7ef985
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
2018-03-07 02:14:31 -08:00
kele bai
4b8d908ae7 di: fix black screen&crash in switch test av&hdmi
PD#161570: di: fix black screen in hdmi 1080p mode

1) fix r321 black screen in hdmi 1080p mode
2) add debug info for recovery mode
3) move pre hold ratio configuration into pecial function

Change-Id: I6e482505da6f3621a1934f600cedcec4341e0743
Signed-off-by: kele bai <kele.bai@amlogic.com>
2018-03-07 00:53:26 -08:00
Laxman Dewangan
f29628b716 gpio: core: Decouple open drain/source flag with active low/high
PD#161621: gpio: core: Decouple open drain/source flag with active low/high

Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Note: the patch from v4.14-rc6 with original commit ID 4c0facddb

Change-Id: I2f652614d3783caee3f510dc70e5e185379f49a7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-03-06 23:15:29 -08:00
Yi Zeng
8b00f1bd65 mtd: change the block number of RSV member into macro
PD#159810: mtd: change the block number of RSV member into macro

in case of customer want change the RSV part size, we'd better
make the block number of every part be a macro, in case miss modified
in somewhere.

Change-Id: I75e665cc3efd8b4bf4ad5a0843f855d4915ae180
Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
2018-03-06 22:55:04 -08:00
Evoke Zhang
d5a6b7027d p241: dts: remove vpu default config in dts, only left clk_level
PD#161337: p241: dts: remove vpu default config in dts, only left clk_level

Change-Id: I3f993324f493417227c9325017c0c346d129320f
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-06 22:54:27 -08:00
Yalong Liu
53fdcb83d6 drm: fix g12a drm dtsi
PD#160546: fix g12a drm dtsi

Change-Id: Ie67f1c413abb7ad58561f8b921e0292763a01f02
Signed-off-by: Yalong Liu <yalong.liu@amlogic.com>
2018-03-06 22:14:44 -08:00
binqi.zhang
b9aa876c0a gpu: set up gpu max freq to 850MHz
PD#156734: gpu: set up gpu max freq to 850MHz

Change-Id: I96d9c9beddd4c5e723fe4c4790c7ce99aeebc1e6
Signed-off-by: binqi.zhang <binqi.zhang@amlogic.com>
2018-03-06 22:13:54 -08:00
Weiming Liu
66a389ab29 lcd: adjust the mipi_host reg address
PD#156734: lcd: adjust the mipi_host reg address

Change-Id: Ia25bd99d5eb32b129b4170558fdf42f820b7c977
Signed-off-by: Weiming Liu <weiming.liu@amlogic.com>
2018-03-06 22:12:10 -08:00
Xing Wang
8dea55e832 audio: auge: pdm supports 96k sample rate
PD#156734: audio: auge: pdm supports 96k sample rate

1) pdm supports 96k sample rate
2) set HCIC gain additional shift as default 0

Change-Id: I056f87cd43bb5c07d04b2baff461bb38c7443f6d
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
2018-03-06 21:59:42 -08:00
Yi Zeng
093712257d mtd: add a new slc nand and avoid the 2nd column in some command
PD#158989: mtd: add a new slc nand and avoid the 2nd column in some command

new slc nand: F59L1G81MB (2M)(same id with F59L1G81MA (2Y),
called a joint name of F59L1G81Mxxx).
We do not send the 2nd column in some command such as: read id,
read parameter etc

Change-Id: Ibeac872231c880efde8a38e6344c326043e7d7dc
Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
2018-03-06 21:44:48 -08:00
Yalong Liu
5f115a3e40 drm: fix g12a buildoot dts
PD#160546: fix g12a buildoot dts

Change-Id: Ia910dbed885a6fd8b294629a3ef3a3a84405069f
Signed-off-by: Yalong Liu <yalong.liu@amlogic.com>
2018-03-06 15:06:57 +08:00
jianxin.pan
e87d0e23be defconfig: generate defconfig with savedefconfig
PD#161257: generate  meson64_smarthome_defconfig and
meson64_defconfig with savedefconfig

Change-Id: I2afe36040aa75ffe0540a0f74a11d8ec93e8f6ba
Signed-off-by: jianxin.pan <jianxin.pan@amlogic.com>
2018-03-05 21:36:37 -08:00
Hong Guo
ac0f02b0a0 CPUFREQ: fix cpufreq system halt for reboot.
PD#156734: cpufreq: fix cpufreq system halt for reboot.

Change-Id: I5c12a58b2fa53ef4c22a7032572983bf566b19b7
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
2018-03-06 12:21:42 +08:00
Qiufang Dai
a22269539f clk: fix g12a pll enable ops mutex in in_atomic
PD#161257: fix g12a pll enable ops mutex in in_atomic
Also fix mpll setting range

Change-Id: I0a3acfbfd111d48f3b31c8f068294c1714ad2886
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
2018-03-06 12:21:42 +08:00
kele bai
95f8f92fab di: fix post write crash for pps enabled in post
PD#156734: di: fix post write crash for pps enabled in post

1) diable post wirte in post write done irq to avoid
   pps send data to fifo

Change-Id: I758be72a2fb2c17b731a7575f24a75bc44c5e816
Signed-off-by: kele bai <kele.bai@amlogic.com>
2018-03-06 12:21:41 +08:00
Nanxin Qin
d40bd17e0a media: adds the register ops for media codec io efuse bus [1/2].
PD#161104: adds the register ops for media codec io efuse bus

Change-Id: I6fc625848442754b089428fd8cb10a3047fa4062
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
2018-03-06 12:21:41 +08:00
zhilei.wu
8d1d53066d dv: enable dv efuse for g12a
PD#157605: dv: enable dv efuse for g12a

Change-Id: I01bcded5f78bbf5c720b4ad95b06b0fc989c2692
Signed-off-by: zhilei.wu <zhilei.wu@amlogic.com>
2018-03-06 12:21:40 +08:00
Colin Cross
b7fdaa641f hardlockup: detect hard lockups without NMIs using secondary cpus
PD#160530: porting hard lockup without nmi support

Emulate NMIs on systems where they are not available by using timer
interrupts on other cpus.  Each cpu will use its softlockup hrtimer
to check that the next cpu is processing hrtimer interrupts by
verifying that a counter is increasing.

This patch is useful on systems where the hardlockup detector is not
available due to a lack of NMIs, for example most ARM SoCs.
Without this patch any cpu stuck with interrupts disabled can
cause a hardware watchdog reset with no debugging information,
but with this patch the kernel can detect the lockup and panic,
which can result in useful debugging info.

Change-Id: I720032cbec78c79d8b4accacc01f183c70e5d403
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
2018-03-05 19:39:42 -08:00
Zongdong Jiao
63d9a28660 hdmitx: optimise the clock divider
PD#156734: optimise the clock divider of VID_PLL_DIV
This is a bridge of analog signal and digital signal module.
With VCO output 4.455Gbps/2160p60hzY420 12bits mode and the
ENCP needs 594MHz, there should divide half to reduce the
risk of HHI_VID_PLL_CLK_DIV.

Change-Id: If6965d64df1aa4b7cb4a8dd66847db3d5d17aea7
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
2018-03-05 19:39:08 -08:00
pengcheng chen
c85c24ded1 osd: remove useless log print
PD#156734: osd: remove useless log print

Change-Id: Ib7638f396ece0ef2d29f81731bca74fd6794e696
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
2018-03-05 19:38:48 -08:00
Evoke Zhang
dfac15acb6 lcd: support two clk_path for g12a
PD#156734: lcd: support two clk_path for g12a
clk_path=0, use hpll, default setting;
clk_path=1, use gp0_pll.
clk_path is configured in dts, and can be changed by sysfs node:
echo path <n> >/sys/class/lcd/clk

Change-Id: I30d29ca8eefb2b3e8f4f7f37e4e0e639b23c06bb
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 19:38:20 -08:00
Long Yu
fc3de90be4 PD#156734: emmc: refixed core phase value for emmc highspeed busmode
Change-Id: I33ce650b3ed9dd6eac41b0814679fb660991a738
Signed-off-by: Long Yu <long.yu@amlogic.com>
2018-03-05 19:37:48 -08:00
Evoke Zhang
2a59abcbba vout: update viu config when change display mode
PD#156734: vout: update viu config when change display mode
also clearup related reg settings in hdmitx/cvbsout/lcd.

Change-Id: I196363d6caaf7158c8e167fb8ca1353c74913263
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 19:35:17 -08:00
Evoke Zhang
14ecb88d48 vpu: add viu2 vpu_clk_gate control
PD#156734: vpu: add viu2 vpu_clk_gate control

Change-Id: I5a40a71e83a673292810233b000e853bd0420fe8
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 19:34:32 -08:00
pengcheng chen
b9144dde67 osd: add viu2 support for g12a
PD#156734: osd: add viu2 support for g12a

Change-Id: If225bdd08a0357960ca307ca7614131211b9aed1
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
2018-03-05 19:34:14 -08:00
Jian Hu
6aaff51d03 arm64: dts: add i2c alias aliases node
PD#158433: arm64: dts: add i2c alias in aliases node

add alias for i2c controller to fasten i2c dev id

Change-Id: I87c1999766c69e9df63f551f0559b8028844d660
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
2018-03-05 19:33:55 -08:00
MingLiang Dong
67a0dad104 amvecm: gamma init enable
PD#156734: amvecm: gamma init enable

Change-Id: Ie09dba089cb0c2c574758f184f4e722162b9ce80
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
2018-03-05 19:33:28 -08:00
Evoke Zhang
e62a806660 clktree: enable dsi_meas clktree
PD#156734: clktree: enable dsi_meas clktree

Change-Id: I2c359119aa3abf8525efd37b53c7c32620b877c5
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 19:33:04 -08:00
Sam Wu
f51688180d factoryBurn: efuse: keyman support efuse user space
PD# 156734 PD# 160873

1, add efuse user space key-name list, then can user key-name rd/wr efuse.

Change-Id: I5feee2e59cefb96fae907403509a86a631e57342
Signed-off-by: Sam Wu <yihui.wu@amlogic.com>
2018-03-05 19:31:06 -08:00
Jiacheng Mei
a5ca07c64d encoder: add encoder for G12A
PD#156734: add encoder for G12A

Change-Id: Ib12f6af79f4264b9de5960cc65b7a3fd13e252f0
Signed-off-by: Jiacheng Mei <jiacheng.mei@amlogic.com>
2018-03-05 19:30:11 -08:00
kele bai
8887d2515d di: turn on cont wr interrupt, fine tune cue
PD#156734: di: turn on cont wr interrupt, fine tune cue

1) turn on cont wr int, disable me int
2) modify cue mode for abnormal mode 2/4/7/8/9
3) move clk adjustment into thread env
4) set min clk rate when di disable
5) modify txlx clk tree

Change-Id: I759324806bb9c9bfa4e83ee4a39e5283c5653f3b
Signed-off-by: kele bai <kele.bai@amlogic.com>
2018-03-05 15:34:37 +08:00
MingLiang Dong
58c056d603 amvecm: optimize G12A hdr code
PD#156734: amvecm: optimize G12A hdr code

1. put all the mtx/lut parameters together

Change-Id: I902c362fe8d8b01f2793789e9150640e929e1e73
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
2018-03-05 15:34:37 +08:00
Brian Zhu
578942fd2d ge2d: fix the vapb div and ge2d gate error
PD#156734: ge2d: fix the vapb div and ge2d gate error

Change-Id: Ib0e8c0328d0c136d7a0b50b0bba13cd95b3070f7
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2018-03-05 15:34:37 +08:00
zhilei.wu
9b6a949801 ge2d: revised ge2d vapb clk for g12a
PD#156734: ge2d: revised ge2d vapb clk for g12a

Change-Id: Ie3acc059560f24957c2c95609fd3ecdde05b0e56
Signed-off-by: zhilei.wu <zhilei.wu@amlogic.com>
2018-03-05 15:34:37 +08:00
Nanxin Qin
28954be0a9 media: drop g12a register defintion change
PD#156734: media: drop g12a register defintion change

Change-Id: Ieadb57750228755a18357567028fa5ef642dc397
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
2018-03-05 15:34:37 +08:00
tao zeng
718776ccb5 mm: optimize for CMA allocate time
PD#159608: mm: optimize for CMA allocate time

1. Make all amlogic-changed mm code configuarable, which are
   wrapped by CONFIG_AMLOGIC_CMA/CONFIG_AMLOGIC_MEMORY_EXTEND
2. Implement some core code of CMA to a single file:
   drivers/amlogic/memory_ext/aml_cma.c
3. detailed imporove steps:
  a) use NOOP as default IO-scheduler for nand based storage.
    which can avoid long time wait for page lock found in
    CFQ scheduler;
  b) use per-cpu thread to allocate CMA concurrent when driver
    request large amount CMA memory; these threads have high
    user nice value to reduce schedule delay;
  c) increase task user nice of mmc queue and kswapd.
  d) wake up kswapd if page are hold by kswap shrink list and
    cma isolated test failed.
  e) Fobidden low user nice task use CMA, which can avoid priority
    inversion problem.
  f) optimize for LRU usage, devide each type of LRU to 2 parts,
    normal pages are linked after LRU head, CMA pages are linked
    after cma_list.
  g) avoid compaction case move cma forbidden pages to cma area.
  h) Increase strength of lowmemory killer.

4. Improve read speed of /proc/pagetrace, a filter can be set to
   reduce message which not print functions allocate memory less
   than filter value:

   echo filter=xxx > /proc/pagetrace

Change-Id: Ie79288b7947aa642e4f7eacc25565559a73660df
Signed-off-by: tao zeng <tao.zeng@amlogic.com>
2018-03-05 15:34:36 +08:00
Nian Jing
acffc9179b cvbs: drop busy mdelay, also update register settings
PD#156734: cvbs: drop busy mdelay, also update register settings

Change-Id: I7515dffda49bdd19407ebabf93ebfad5f8ce8125
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
2018-03-05 15:34:36 +08:00
Xing Wang
f15e19089e sound: minor fix make array data ready only, short delay
PD#156734: sound: minor fix make array data ready only, short delay

Change-Id: I12d2de5d52c5774bdf56b9358fb9213c8c77fafa
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
2018-03-05 15:34:36 +08:00
Dezhi Kong
d99d7d0d23 SR: only disable sr for g12a default
PD#156734: sr: only disable sr for g12a default

Change-Id: I32b7f8be08adaebb2557eab4ed1ad39c084f36d6
Signed-off-by: Dezhi Kong <dezhi.kong@amlogic.com>
2018-03-05 15:34:36 +08:00
Xing Wang
86c67c9699 audio: auge: pdm supports 64k sample rate
PD#156734: audio: auge: pdm supports 64k sample rate

Change-Id: Ia938906fc0aef51d66b947b376b62c21fb2c8c76
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
2018-03-05 15:34:36 +08:00
zhilei.wu
59aee35fda dv: add dolby vision driver for g12a
PD#156734: dv: add dolby vision driver for g12a

Change-Id: I02490c69f6f834f491278403dfcc8923a3fcee77
Signed-off-by: zhilei.wu <zhilei.wu@amlogic.com>
2018-03-05 15:34:35 +08:00
Qiufang Dai
b2eca7a2de dts: G12A: enable reboot and fix mhu playload base addr
PD#156734: enable reboot and fix mhu playload base addr

Change-Id: Ia0849bb9a695f91ea861c6f7ddd1079e4ba70175
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
2018-03-05 15:34:35 +08:00
qi duan
6246496357 USB: set UTMI interface is 8bit for new phy
PD#156734: USB: set UTMI interface is 8Bit for new phy on dwc2 controller.[1/1]

Change-Id: I2f57664ec75787066f6bac5bcee368b6904966f1
Signed-off-by: qi duan <qi.duan@amlogic.com>
2018-03-05 15:34:35 +08:00
Liang Yang
57386ea831 nand: improve nfc clock
PD#156734: nand: improve nfc clock base on pad driver strength
set level1

Change-Id: I1a9fd710e415a064572063292ef569bf67e527a4
Signed-off-by: Liang Yang <liang.yang@amlogic.com>
2018-03-05 15:34:35 +08:00
Brian Zhu
ee49f5c606 osd: fix the fifo ctrl setting error
PD#156734: osd: fix the fifo ctrl setting error

Change-Id: I67560a98592b800658d9d8da3a314aac42d66ad2
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
2018-03-05 15:34:34 +08:00
Evoke Zhang
04c7f90950 lcd: add mipi-dsi checking panel state support
PD#156734: lcd: add mipi-dsi checking panel state support
after config check_state parameters in dts,
you can get state by below sysfs node:
cat /sys/class/lcd/mpstate

Change-Id: I6e1d8452e17166cd9c04c2a4979f42308f995b9a
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 15:34:34 +08:00
Yalong Liu
ae37c44fc6 DRM: add drm support for g12a
PD#160546: DRM: add drm support for g12a
Verified on g12a

Change-Id: I5bfa4ad388e181af629e013a8d7c516ae5fc3fa4
Signed-off-by: Yalong Liu <yalong.liu@amlogic.com>
2018-03-05 15:34:34 +08:00
Evoke Zhang
8d8181d96e vpu: update vpu_clk_gate control for g12a
PD#156734: vpu: update vpu_clk_gate control for g12a

Change-Id: Ia0d2bce8ea0e6951a435fc236e4b82bbd32ebcca
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
2018-03-05 15:34:34 +08:00
weiming.liu
9fc3e6cb44 bl_extern: add lp8556 driver
PD#156734: bl_extern: add lp8556 driver

Change-Id: Id38b698cbc87a227abdcd52037c65df87fc8d654
Signed-off-by: weiming.liu <weiming.liu@amlogic.com>
2018-03-05 15:34:34 +08:00
kele bai
d56113f2b7 di: fix MADI flicker for mem enable
PD#156734: di: fix MADI flicter for mem disable

1) pre ctrl bit11 error cause mem disable
2) update vpu clkb rate
3) fix pulldown parameters probe error
4) fix pulldown count error add default threshold
5) fix pre timeout for intr shared with post
6) mif gate freerun according vlsi avoid mif reg config incorrect

Change-Id: Id8dddff213910bffb6e40b2667738e9ee3d720ca
Signed-off-by: kele bai <kele.bai@amlogic.com>
2018-03-05 15:34:34 +08:00