Since RK3576 dwc3 integrate in a single node, so check
its own node and set autosuspend delay for NO_GKI desired.
In addition, this also cleanup the related codes for the
rockchip platform.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I1ef762559ab98cb5e80c1bd787c5a4cfe1429220
Since the mailbox register is changed in the new controller, refactor
the driver to make compatible for it.
There is only one channel in a mailbox, besides, write cmd register
can trigger the interrupt support.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I0df6923cfd6db5b450b78ee8d42df949b7d80bdd
This adds the following properties.
- "rockchip,rk3576-mbox" : update compatible property.
- rockchip,enable-cmd-trigger : enable write cmd register to
trigger interrupt.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ieb2e9d248b0eac387f7a6f862461d11aefb4905b
1.Add pinctrl config in rockchip_pwm_set_capture().
2.Add input_sel flag to select the input of io or cru.
Change-Id: I95953bdb0dc6b939acc0db5d335a5bcfcc7b884c
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
1.Add pinctrl config in rockchip_pwm_set_freq_meter().
2.Add input_sel flag to select the input of io or cru.
3.Use usleep_range() instead of readl_relaxed_poll_timeout,
because there is no need to poll interrupt status.
Change-Id: I6ea4456539fe143baf2bfce70386c51f801a00a3
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
1.Select pinctrl state in capture mode.
2.Use usleep_range() instead of readx_poll_timeout, because
there is no need to poll capture_cnt and the read
of capture_cnt may be interrupted.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I9360a42aca374ed5eb089befd05571c4d32038f2
1.Add pinctrl config in rockchip_pwm_global_ctrl().
2.Config the dclk for grant channel in PWM_GLOBAL_CTRL_ENABLE
and PWM_GLOBAL_CTRL_DISABLE commands.
3.Add flag is_clk_enabled to confirm the status of dclk.
Change-Id: I9a377d6a72d2f242f9df5e707c42d86db0c13f69
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Using macro will be more efficient if related function
is called frequently.
In addition, remove unused parameter cntr in struct
rockchip_pwm_regs for pwm v1.
Change-Id: I7a1d5aa6e08845afc9501756dadacef09f527a13
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
The RK3576 SoC has six channels TS-ADC(TOP, BIG_CORE, LITTLE_CORE
DDR, NPU and GPU).
Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: I800dee18937d3d35243896fe22a953eac111ba3f
Add constants and callback functions for the dwmac on RK3576 soc.
As can be seen, the base structure is the same.
Change-Id: If5081998d98a20c6efe14992e00b719ae0ad0dd2
Signed-off-by: David Wu <david.wu@rock-chips.com>
These are ic debug reset, practically unusable.
Change-Id: Ibc5817ccf9d17abf35d1ff32c2a047866ef1dd2f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The RK3576 SoC has two independent USB2.0 PHYs, and
each PHY has one port.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I017dd09b83c8330c9f4a3d6d8a41eaa1d4c88df7
This adds the necessary data for handling otp on the rk3576.
Change-Id: I42536b05a24f32d0c98ceebe82aec5af9716513f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The pdm version 2 support more features:
1. Support gain control
2. Support more pdm clk, like 2.4Mhz
3. Support single channel single data
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I3651e4416b30e84f0796a3a09574f39908adbfb5
Rockchip platform will put phase settings into dw_mmc controller
instead. For USRID register, 0x20230002 stands for that this new
feature is implemented.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ida9d25f7631fe57b87c70832671973bb97d9f82f
